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Hi,
The configuration settings Freescale Support team provided for AK4584 correctly generate clocks for AK4556 (the changed part in the configuration is: REG#>9=$A6; REG#>2=$E). I can see LRCLK is 192KHz. I use the audio processing chain: J3->U2(AK4556)->U1(DSP56371)->U2->J4. And the assembly template application works well with them, it passes through the 1KHz sine wave pretty clearly.
But, the problem is with the C-template application. It corrupts the input sine wave (applied to J3 input for the instance) even sampling at 96KHz, and in the more severe way at 192KHZ. So, I think there is a problem in the Soundbite C-template application in the way it configures the HW or processes the interrupts.
Please note that AK4584 does not support 192K ADC but it do can generate
LRCLK/BCLK clock for AK4556.
From the features list of AK4584 data sheet(
http://datasheet.digchip.com/025/025-00607-0-AK4584.pdf) we can see that
this codec
1. Support 24bit 2ch 96K ADC, 192K DIR
2. Support 24bit 2ch 192K DAC, 192K DIT
In order to support 192K, we should use 128fs mode and quad speed mode as
well. In the section "System clock", that mentioned "The ADC is
powered down
during quad speed mode".
AK4556 clock has been configured as slave move with CKS3:0 = 0100. It should
support fs=192K.
Hi,
The configuration settings Freescale Support team provided for AK4584 correctly generate clocks for AK4556 (the changed part in the configuration is: REG#>9=$A6; REG#>2=$E). I can see LRCLK is 192KHz. I use the audio processing chain: J3->U2(AK4556)->U1(DSP56371)->U2->J4. And the assembly template application works well with them, it passes through the 1KHz sine wave pretty clearly.
But, the problem is with the C-template application. It corrupts the input sine wave (applied to J3 input for the instance) even sampling at 96KHz, and in the more severe way at 192KHZ. So, I think there is a problem in the Soundbite C-template application in the way it configures the HW or processes the interrupts.