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iMX8QM SCU/M4 RGPIO Interrupt

Question asked by Stan Bertrand on Feb 3, 2020
Latest reply on Feb 4, 2020 by igorpadykov

Hi,

 

The iMX8QM has two M4 with their down peripherals. One of which is RGPIO or Rapid GPIO ( perhaps even Fast GPIO, FGPIO).

 

Does the M4 GPIO block has interrupt support ?

 

It would appear not to be the case since the SDK for the M4 cores do not have interrupt register. 
/** GPIO - Register Layout Typedef */
typedef struct {
  __IO uint32_t PDOR;                              /**< Port Data Output Register, offset: 0x0 */
  __O  uint32_t PSOR;                              /**< Port Set Output Register, offset: 0x4 */
  __O  uint32_t PCOR;                              /**< Port Clear Output Register, offset: 0x8 */
  __O  uint32_t PTOR;                              /**< Port Toggle Output Register, offset: 0xC */
  __I  uint32_t PDIR;                              /**< Port Data Input Register, offset: 0x10 */
  __IO uint32_t PDDR;                              /**< Port Data Direction Register, offset: 0x14 */
} GPIO_Type;
/** RGPIO - Register Layout Typedef */
typedef struct {
  __IO uint32_t PDOR;                              /**< Port Data Output Register, offset: 0x0 */
  __O  uint32_t PSOR;                              /**< Port Set Output Register, offset: 0x4 */
  __O  uint32_t PCOR;                              /**< Port Clear Output Register, offset: 0x8 */
  __O  uint32_t PTOR;                              /**< Port Toggle Output Register, offset: 0xC */
  __I  uint32_t PDIR;                              /**< Port Data Input Register, offset: 0x10 */
  __IO uint32_t PDDR;                              /**< Port Data Direction Register, offset: 0x14 */
} RGPIO_Type;
 
Furthermore, the SDK for the M4 cores does not list any RGPIO interrupt vector : 
M4_0_TPM_IRQn                = 19,               /**< Timer PWM Module */
  Reserved36_IRQn              = 20,               /**< Reserved */
  Reserved37_IRQn              = 21,               /**< Reserved */
  M4_0_LPIT_IRQn               = 22,               /**< Low-Power Periodic Interrupt Timer */
  Reserved39_IRQn              = 23,               /**< Reserved */
  Reserved40_IRQn              = 24,               /**< Reserved */
  M4_0_LPUART_IRQn             = 25,               /**< Low Power UART */
  Reserved42_IRQn              = 26,               /**< Reserved */
  M4_0_LPI2C_IRQn              = 27,               /**< Low-Power I2C - Logical OR of master and slave interrupts */
  Reserved44_IRQn              = 28,               /**< Reserved */
Is this correct ?
Is there any way to have GPIO interrupt in M4 firmware ? What are the constraints ?
Regards,
Stan

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