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LVDS no image using sn65dsi84

Question asked by hank wang on Sep 18, 2019
Latest reply on Sep 18, 2019 by igorpadykov

Hi ,  I have a problem about LVDS image. The processor is imx8mq and the version of BSP is 4.14.78. Panel did turn on back light, but no image. I need to check which some items?  

 

Below is my DTS configuration for LVDS.

 

&i2c1 {
dsi_lvds_bridge: sn65dsi84@2d {
compatible = "ti,sn65dsi83";
reg = <0x2d>;
ti,dsi-lanes = <4>;
ti,lvds-format = <2>;
ti,lvds-bpp = <24>;
ti,width-mm = <236>;
ti,height-mm = <176>;
/* MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS */
ti,dsi-mode-flags = <0x401>;
enable-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
status = "okay";

display-timings {
lvds {
/* IVO g084sn05 */
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <240>;
hfront-porch = <48>;
vback-porch = <23>;
vfront-porch = <3>;
hsync-len = <32>;
vsync-len = <12>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
};
};

port {
sn65dsi84_in: endpoint {
remote-endpoint = <&mipi_dsi_bridge_out>;
};
};
};
};

 

&mipi_dsi_phy {
status = "okay";
};

 

&dcss {
status = "okay";
disp-dev = "mipi_disp";

clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>,
<&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
<&clk IMX8MQ_CLK_DISP_RTRM_ROOT>,
<&clk IMX8MQ_CLK_DC_PIXEL>,
<&clk IMX8MQ_CLK_DUMMY>,
<&clk IMX8MQ_CLK_DISP_DTRC>;
clock-names = "apb", "axi", "rtrm", "pix_div", "pix_out", "dtrc";

assigned-clocks = <&clk IMX8MQ_CLK_DC_PIXEL>,
<&clk IMX8MQ_CLK_DISP_AXI>,
<&clk IMX8MQ_CLK_DISP_RTRM>,
<&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
<&clk IMX8MQ_VIDEO_PLL1>;
assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
<&clk IMX8MQ_SYS1_PLL_800M>,
<&clk IMX8MQ_SYS1_PLL_800M>,
<&clk IMX8MQ_CLK_25M>;
assigned-clock-rates = <600000000>,
<800000000>,
<0>,
<400000000>,
<599999999>;

dcss_disp0: port@0 {
reg = <0>;

dcss_disp0_mipi_dsi: mipi_dsi {
remote-endpoint = <&mipi_dsi_in>;
};
};
};

 

&mipi_dsi {
status = "okay";
assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>,
<&clk IMX8MQ_CLK_DSI_CORE>,
<&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
<&clk IMX8MQ_VIDEO_PLL1>;
assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>,
<&clk IMX8MQ_SYS1_PLL_266M>,
<&clk IMX8MQ_CLK_25M>;
assigned-clock-rates = <24000000>,
<266000000>,
<0>,
<599999999>;

port@1 {
mipi_dsi_in: endpoint {
remote-endpoint = <&dcss_disp0_mipi_dsi>;
};
};
};

 

&mipi_dsi_bridge {
status = "okay";

port@2 {
mipi_dsi_bridge_out: endpoint {
remote-endpoint = <&sn65dsi84_in>;
};
};
};

 

  

 

Thanks.

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