Hi Kevin,
If I understand, you want to restrict the core access (write and read) in Descriptor 5.
You write:
MPU->RGD[5].WORD2 = 0x7c0;
Which means:
[4-3] M0SM = 0b00 r/w/x; read, write and execute allowed.
It should be
MPU->RGD[5].WORD2 = 0x7D8;
[4-3] M0SM = 0b11 Same as User mode defined in M0UM
[2-1] M0UM = 0b000 An attempted access of that mode may be terminated with an access error (if not allowed by
another descriptor) and the access not performed.
But looking at Descriptor 0 and the core access rights in the Supervisor mode, I see that you allows the core to access the whole map.
So, the descriptor 5 won't trigger anyway.
Regards,
Daniel