comp_e

MC9S08QG8: Help getting SPI to work with external EEPROM

Discussion created by comp_e on Feb 16, 2009
Latest reply on Mar 19, 2009 by bigmac
Hi, this is my first post and I am in need of some assistance.  I am trying to use Microchip 25AA512 EEPROM via spi and am running into quite a few problems.

Datasheet for EEPROM: http://ww1.microchip.com/downloads/en/DeviceDoc/22021E.pdf
Datasheet for  S08QG8: http://ww1.microchip.com/downloads/en/DeviceDoc/22021E.pdf

The problem I'm getting is a lack of response from the EEPROM.  I'm sending out what I believe to be the correct code to start it up, however I don't get any response back from the chip.  I have verified this fact vie logic analyzer attached to all EEPROM perifrials.  Below is the initialization code I have written.  However, I am using beans and have uploaded the entire project in a zip file (project is called newproject).

Thank you to anyone who can help me figure this out.  (My guess is that it may be due to timing, but then again, this is the first time I've ever used a MC so I can't be all that sure).

/** EEprom power up follows the initialization sequence
 *  specified in the EEprom data sheet for 25AA512 EEPROM
 *  Each Send is required.  Also, assume that !CS is tied
 *  to ground, !HOLD and !WP are tied high.  This is done
 *  off chip (these pins are not hooked up to the mcu and
 *  require no mcu pins to be set: done to maximize usabl
 *  i/o pins).  All EEprom OP-Codes are defined.
 *
 *  SPI hardware settings are managed by the SWSPI bean.
 * 
 *  - SPI1_SendChar(char ch)
 *  - SPI1_RecvChar(char *ch)
 * 
 */
void powerUpEEprom(void) {
       
    SPI2_Init();
    PTBD_PTBD6 = 0;
    waitAbit();
   
    /*
    #define READ    0x03          // Read  from mem array beg. at selected address
    #define WRITE   0x02          // Write to mem array beg. at selected address
    #define WREN    0x06          // Set   the latch (enable write operations)
    #define WRDI    0x04          // Reset the latch (disable write operations)
    #define RDSR    0x05          // Read         – STATUS register
    #define WRSR    0x01          // Write        – STATUS register
    #define PE      0x42          // Page Erase   – erase one page in mem array
    #define SE      0xD8          // Sector Erase – erase one sector in mem array
    #define CE      0xC7          // Chip Erase   – erase all sectors in mem array
    */
    while(SPIS_SPTEF != 1);
    SPIS;
    data = getReg8(SPID);
    setReg8(SPID, WRDI);     // data = 0

    while(SPIS_SPTEF != 1);
    SPIS;
    data = getReg8(SPID);
    setReg8(SPID, WRSR);     // data = 4

    while(SPIS_SPTEF != 1);
    SPIS;
    data = getReg8(SPID);
    setReg8(SPID, WRITE);    // data = 1

    while(SPIS_SPTEF != 1);
    SPIS;
    data = getReg8(SPID);
    setReg8(SPID, PE);

    while(SPIS_SPTEF != 1);
    SPIS;
    data = getReg8(SPID);
    setReg8(SPID, SE);

    while(SPIS_SPTEF != 1);
    SPIS;
    data = getReg8(SPID);
    setReg8(SPID, CE);

    while(SPIS_SPTEF != 1);
    SPIS;
    data = getReg8(SPID);
    setReg8(SPID, WREN);
   
    while(SPIS_SPTEF != 1);
    SPIS;
    SPID;
    setReg8(SPID, 0x00);
    while(SPIS_SPTEF != 1);
   
    //PULSE TO LATCH WRITE ENABLE
    PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;
    PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;
    PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;
    PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;
    PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;
    PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;
    PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;
    PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;
    PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;
    PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;
    PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;
    PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;PTBD_PTBD6 = 1;
    PTBD_PTBD6 = 0;PTBD_PTBD6 = 0;PTBD_PTBD6 = 0;PTBD_PTBD6 = 0;PTBD_PTBD6 = 0;
    PTBD_PTBD6 = 0;PTBD_PTBD6 = 0;PTBD_PTBD6 = 0;PTBD_PTBD6 = 0;PTBD_PTBD6 = 0;
   


    while(SPIS_SPTEF != 1);
    SPIS;
    SPID;
    setReg8(SPID, RDSR);              // Check write enable set correctly (Read Status Reg on EEPROM)
   
    while(SPIS_SPRF != 1);
    setReg8(SPID, 0x00);
    while(SPIS_SPRF != 1);            // Wait for eeprom to send status
    data = getReg8(SPID);             // Save Status
}

FreeRTOS-3.2.4-HCS08_Files.zip
Message Edited by dkindler on 2009-08-20 03:32 PM

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