Darrell Martin

SPI won't work when SCLK slew rate is limited - 9s12xhz512

Discussion created by Darrell Martin on Feb 14, 2009
Latest reply on Feb 19, 2009 by kef
I am running a 9s12xhz512 with a serial chain attached to the SPI. If SRRS bit 6 (SCLK) is set to limit the slew rate of this pin then data always comes back as zero. I can monitor the data at the MISO pin and see the data is clearly both high and low but the read of SPIDR always returns zero. SPISR shows no errors. In case you are wondering if CPOL & CPHA are correct I can tell you that I do see data on the input that is high on both edges of the clock. If I clear bit 6 of the SRRS everything works fine. I am only slowing it down to help pass my EMI problems.
 
Any Ideas? Thanks in advance.
 
 
Added p/n to subject.


Message Edited by NLFSJ on 2009-02-16 07:36 PM

Outcomes