AnsweredAssumed Answered

Why does PBI stop after 0x300 bytes?

Question asked by Tanjeff Moos on Jun 12, 2019
Latest reply on Jun 14, 2019 by Tanjeff Moos

Hi experts,


I'm trying to secure-boot from SD card, on a QorIQ T1023. I created a PBI which should do the following:

  • Configure CPC as SRAM (256 KiB) and map it to 0xbff0_0000
  • Configure ACS to be at 0xbef4_0000 (i.e. SRAM is part of ACS)
  • Set SCRATCHRW1 to 0xbff3_fffc (which is located within SRAM)
  • Setup SPI (this is legacy - I simply didn't touch it)
  • Copy CSF from SD card into SRAM (starting at ACS+0xfd_7000)
  • Copy U-Boot SPL from SD card into SRAM (starting at ACS+0xfd_8000)

I can monitor the SD card lines with an logic analyzer. What I see is:

  1. The PBI is read from SD card, but only the first 70 bytes or so (i.e. the RCW is read)
  2. 1,22 ms pause (maybe RCW is being applied?)
  3. The PBI is read again from SD card, starting with RCW, but only the first 0x300 bytes.
  4. The SoC stops. Nothing more happens.

I wonder that reading the PBI stops, even before the ISBC is started. I attach my binary to this post. It consists of the PBI and the main U-Boot (which comes after the PBI). I copied this binary to my SD card, at offset 0x1000.


Can you explain what happens?


Kind regards, Tanjeff