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[i.MX6 ULL] General purpose clock output / cannot access I2S1_MCR

Question asked by Christian Eggers on Mar 21, 2019
Latest reply on Mar 25, 2019 by Christian Eggers

I would like to (mis)use I2S1 MCLK as a general purpose clock output for PLL4 (I don't need any audio feature). I found the following references in IMX6ULLRM.pdf:

  • Page 3109, Table 45-1.
    SAI1_MCLK
    Audio Master Clock. The master clock is an input when externally generated and an output when internally generated.
  • Page 3111, Figure 45-2.
  • Page 3120, I2S memory map
    202_8100 SAI MCLK Control Register (I2S1_MCR)
  • Page 3142, SAI MCLK Control Register (I2Sx_MCR)

I tried to write to I2S1_MCR at 0x02028100 using a JTAG debugger in order to set I2S1_MCR.MOE to 1. But the debugger could not access this register due to a bus error. Access to all other I2S1 registers works without any problems.

 

Question 1: How can output SAI1_MCLK on an external pin?

Question 2: Can I instead use SAI1_RX_BCLK or SAI1_TX_BCLK as a general purpose clock output?

 

I already considered using CCM_CLKO1/CCM_CLKO2 as a general purpose clock output, but unfortunatley these pins are only available on USDHC1.

 

regards

Christian

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