When erasing and writting DFLASH and PFLASH, is it necessary to disable all the interrupt and recover the interrupt after finishing erasing and writting DFLASH and PFLASH?
Hi,It depends on where the interrupt vector table and the interrupt routines are located.Because if there are located on the same flash block, they cannot be called while there is a program/erase operation in progress on the same block.Please take a look at 126.96.36.199 Allowed simultaneous flash operations and 36.1.9 Simultaneous operations on PFLASH read partitions, S32K11x RM rev.9.
What I want to ask is that If I Enable all interrupts(like the PIT and CAN interrupt and so on),Can I erase or program the PFLASH and DFLASH at the same time?
Or must I disable all the interrupts before erase or program the PFLASH and DFLASH?
What S32K1xx derivative do you have? S32K116/118/142/144 have only one PFlash block.
Basically, you can't read/execute code from a PFlash block when there is a flash operation (erasing/programming) on the PFlash block in progress. So, if you have the interrupt table or the ISRs functions in the block or the ISR read some data from the PFlash block, you must disable the interrupts before the PFlash operation. Avoid any simultaneous access to the block. Similarly for DFlash.
Thanks for your help.
I use S32K144, Pflash size is 512K Bytes.
I still have a doubt, if I Erase and Program the Pflash, must the Erase and Program code in the RAM.
What I means is : Must I put the Erase and Program Pflash codes in RAM and run the erase and program Pflash code from RAM?
FTFC->FSTAT = FTFC_FSTAT_CCIF_MASK; // launch commandwhile((FTFC->FSTAT & FTFC_FSTAT_CCIF_MASK) == 0); // wait until complete
OK， I know, I can see the SDK codes like this :
static status_t FLASH_DRV_CommandSequence(const flash_ssd_config_t * pSSDConfig)
That means it is in the RAM.
Retrieving data ...