Hi,
I am using a flexio to manage communication with ADS1222 24 bit Analog to digital converter.
One shifter for the serial data got on the DRDY/DOUT signal.
One timer generating shift clock and the SCLK clock signal
The trigger of the timer should be the falling edge of the DRDY/DOUT signal.
What's happening during timer decrementing if there are falling edges on the DRDY/DOUT signal ?
Thanks
Hi Michele,
Could you tell us which MCU are you using?
Thanks in advance!
Best Regards,
Carlos Mendoza
Technical Support Engineer
Hi Carlos,
Thank you for your interest in my question. I’m using iMXRT1050.
Best regards
Michèle BLANC
Ingénieur logiciel
Tél : 04 72 78 35 72
mblanc@centralp.fr<mailto:mblanc@centralp.fr>
www.centralp.fr<http://www.centralp.fr/>;
De : Carlos_Mendoza
Envoyé : jeudi 10 janvier 2019 17:55
À : BLANC Michelle <mblanc@centralp.fr>
Objet : Re: - Re: Flexio for communication with ADS1222
NXP Community <https://community.freescale.com/resources/statics/1000/35400-NXP-Community-Email-banner-600x75.jpg>
Re: Flexio for communication with ADS1222
reply from Carlos_Mendoza<https://community.nxp.com/people/Carlos_Mendoza?et=watches.email.thread> in MCUXpresso Software and Tools - View the full discussion<https://community.nxp.com/message/1099919?commentID=1099919&et=watches.email.thread#comment-1099919>
Hi,
From i.MXRT1050 datasheet, the Max. input transition time is 25ns.
The ADS1222 using SCLK falling edge to sample the data, which required min. t3 value is 100ns.
There has enough time for FlexIO pin to capture the data value.
Have a great day,
Mike
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