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IMX6UL Boot ROM IOMUX configuration

Question asked by Christophe Niclaes on Dec 11, 2018
Latest reply on Dec 11, 2018 by Christophe Niclaes

I've a new custom board with IMX6UL configured to boot on USDHC1 controller with an eMMC connected.


I can't find a document describing what's the IOMUX configuration used by the ROM Bootloader when it starts, in order for me to be sure that the way I connected some signals is correct.


My specific problem is related to the nRST signal of the eMMC which is connected to NAND_WP_B (which has the USDHC1_RESET_B function available). What I/O is used by the ROM Bootloader for this function?


Do you have a document describing the complete I/O mapping used by the ROM Bootloader?