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MPC5744P ADC_isr problem

Question asked by Woosik Cho on Aug 14, 2018

Hi, I have a problem about configuring the PWM switch control code.

 

In my code, I want to synchronize  PWM with ADC. 

So I configured PWM, CTU and ADC.

After that I tried to use ADC_ISR to make the main code  work. 

But since I don't know how to use ADC_ISR, I refer the etimer example code.

 

 Therefore, I made "ADC_ISR  in intc_SW_mode_isr_vectors_MPC5744p.c" file 

and put it into "ADC_ISR and ADC_init", but it didn't work.

 

I will attach the code here. Please help me to work it, if you can.

 

Thank you so much.

 

/*****************************************************************************/
/* FILE NAME: intc_SW_mode_isr_vectors_MPC5744P.c COPYRIGHT(c) Freescale 2015*/
/* All Rights Reserved */
/* DESCRIPTION: MPC5744P ISR vectors for INTC in software vector mode */
/* Based on MPC5744P ref manual rev 5.1 Table 7-20. */
/* USAGE: For desired vector #, replace "dummy" with ISR name and declare */
/* your isr name extern like the example below: */
/* extern void MyPeripheralISR(void); */
/* */
/*****************************************************************************/
/* REV AUTHOR DATE DESCRIPTION OF CHANGE */
/* --- ----------- ---------- --------------------- */
/* 1.0 S Mihalik 03 Aug 2015 Initial version */
/*****************************************************************************/
#include "typedefs.h"
/*========================================================================*/
/* PROTOTYPES */
/*========================================================================*/
void dummy (void);
//extern void ETimer_ISR(void);
extern void ADC_ISR(void);

/*========================================================================*/
/* GLOBAL VARIABLES */
/*========================================================================*/

const uint32_t __attribute__ ((section (".intc_vector_table"))) IntcIsrVectorTable[] = {

(uint32_t) &dummy, /* Vector # 496 ADC_EOC ADC_0 */
(uint32_t) &dummy, /* Vector # 497 ADC_ER ADC_0 */
(uint32_t) &dummy, /* Vector # 498 ADC_WD ADC_0 */
(uint32_t) &dummy, /* Vector # 499 Reserved for ADC ADC_0 */

(uint32_t) &ADC_ISR, /* Vector # 500 ADC_EOC ADC_1 */
(uint32_t) &dummy, /* Vector # 501 ADC_ER ADC_1 */
(uint32_t) &dummy, /* Vector # 502 ADC_WD ADC_1 */
(uint32_t) &dummy, /* Vector # 503 Reserved for ADC ADC_1 */
(uint32_t) &dummy, /* Vector # 504 ADC_EOC ADC_2 */
(uint32_t) &dummy, /* Vector # 505 ADC_ER ADC_2 */
(uint32_t) &dummy, /* Vector # 506 ADC_WD ADC_2 */
(uint32_t) &dummy, /* Vector # 507 Reserved for ADC ADC_2 */
(uint32_t) &dummy, /* Vector # 508 ADC_EOC ADC_3 */
(uint32_t) &dummy, /* Vector # 509 ADC_ER ADC_3 */
(uint32_t) &dummy, /* Vector # 510 ADC_WD ADC_3 */

 

};


void dummy (void) { /* Dummy ISR vector to trap undefined ISRs */
while (1) {}; /* Wait forever or for watchdog timeout */
}

 

 

 

 

 

 

"main.c"


#include "derivative.h" /* include peripheral declarations */

#include "project.h"
#include "mode_entry.h"
#include "adc.h"

/*******************************************************************************
* Constants and macros
*******************************************************************************/
#define LED1_pin 43


/*******************************************************************************
* Function prototypes
*******************************************************************************/
static void SysClk_Init(void);
//static void InitPeriClkGen(void);
static void GPIO_Init(void);
static void HW_Init(void);
static void ETimer_Init(void);
static void FlexPWM_Init(void);
void ETimer_ISR(void);
void CTU_Init(void);
static void ADC_Init(void);

// for adc

void update_LEDs(void); /* Update LEDs with scaled chan 9 result */
extern uint16_t Result[3]; /* ADC channel conversion results */
extern uint16_t ResultInMv[0];

 


extern void xcptn_xmpl(void);


#define AUX0_clk_DIV1 7
#define SGEN_IOFREQ 1600

#define AUX0_clk_DIV0 0
#define PWM_PRESCALER 0
#define PWM_MODULO 1600

//etimer
int adc_count=0;
int etimer_cnt = 0;
uint16_t result[3];
float Duty=0.7, ADC_SCALE_I=0;
float VHsen = 0, VLsen = 0;
float VHfil = 0, VLfil = 0;
float Isen[3] = {0,0,0};


/*******************************************************************************
* Local functions
*******************************************************************************/


/*******************************************************************************
Function Name : HW_init
Engineer : Martin Kovar
Date : Dec-29-2015
Parameters :
Modifies :
Returns :
Notes : initialization of the hw for the purposes of this example
Issues :
*******************************************************************************/
static void HW_Init(void)
{
xcptn_xmpl (); /* Configure and Enable Interrupts */
SysClk_Init();
// InitPeriClkGen();
GPIO_Init();
FlexPWM_Init();
}


/*******************************************************************************
Function Name : Sys_Init
Engineer : Martin Kovar
Date : Dec-29-2015
Parameters : NONE
Modifies : NONE
Returns : NONE
Notes : Enable XOSC, PLL0, PLL1 and enter RUN0 with PLL1 as sys clk (200 MHz)
Issues : NONE
*******************************************************************************/
// Enable XOSC, PLL0, PLL1 and enter RUN0 with PLL1 as sys clk (200 MHz)
void SysClk_Init(void)
{

MC_CGM.AC3_SC.B.SELCTL = 0x01; //connect 40 MHz XOSC to the PLL0 input

//MC_CGM.AC4_SC.B.SELCTL = 0x11; //connect 40 MHz XOSC to the PLL1 input 

/* Program PLL1 to same frequency as PLL0.
* MFD multiplies input by at least 10. So multiply by 10 and divide by 10.
* 10/10 = 1, so same frequency as PLL0
*/
PLLDIG.PLL1DV.B.RFDPHI = 10;
PLLDIG.PLL1DV.B.MFD = 10;

// Set PLL0 to 60MHz(PHI), 50MHz(PHI1) with 40MHz XOSC reference // PLL0 clock div -> 60MHz(PHI), 50MHz(PHI1)
//PLLDIG.PLL0DV.R = 0x3008100A; // PREDIV = 1, MFD = 10, RFDPHI = 8, RFDPHI1 = 6
PLLDIG.PLL0DV.B.RFDPHI1 = 8; //6 4. 320MHz -div 8-> 40MHz PHI1
PLLDIG.PLL0DV.B.RFDPHI = 1; //8 3. 320MHz -div 1-> 320MHz PHI
PLLDIG.PLL0DV.B.PREDIV = 2; //1 1. 40MHz -div 2 -> 20MHz
PLLDIG.PLL0DV.B.MFD = 16; //10 2. 20MHz -Mul 16-> 320MHz'

// MC_ME.RUN0_MC.R = 0x00130071; // RUN0 cfg: IRC ON,OSC0 ON,,PLL1 OFF, PLL0 ON, sysclk=XOSC(40MHz) 
MC_ME.RUN0_MC.B.PWRLVL = 0; // Power level -> 
MC_ME.RUN0_MC.B.PDO = 0; // I/O output power-down control -
MC_ME.RUN0_MC.B.MVRON = 1; // Main voltage regulator control -> 
MC_ME.RUN0_MC.B.FLAON = 3; // Flash power-down control -> 11:Flash is in normal mode 
MC_ME.RUN0_MC.B.PLL1ON = 0; // PLL1 disable
MC_ME.RUN0_MC.B.PLL0ON = 1; // PLL0 enable
MC_ME.RUN0_MC.B.XOSCON = 1; // XOSC enable -> MC_CGM.AC3_SC.B.SELCTL = 0x01; 
MC_ME.RUN0_MC.B.IRCON = 1; // IRCON enable -> MC_CGM.AC3_SC.B.SELCTL = 0x00; 
MC_ME.RUN0_MC.B.SYSCLK = 1; // system clock selector -> system clock

//MC_CGM.SC_DC0.R = 0x80030000; // PBRIDGE0/PBRIDGE1_CLK at syst clk div by 1 ... (20 MHz)

// Mode Transition to enter RUN0 mode:
MC_ME.MCTL.R = 0x40005AF0; // Enter RUN0 Mode & Key
MC_ME.MCTL.R = 0x4000A50F; // Enter RUN0 Mode & Inverted Key //
while (MC_ME.GS.B.S_MTRANS) {}; // Wait for mode transition to complete
while(MC_ME.GS.B.S_CURRENT_MODE != 4) {}; // Verify RUN0 is the current mode

 

// Set PLL1 to 200 MHz with 40MHz XOSC reference
PLLDIG.PLL1DV.R = 0x00020014; // MFD = 20, RFDPHI = 2
MC_ME.RUN_PC[0].R = 0x000000FE; // enable peripherals run in all modes
MC_ME.PCTL239.B.RUN_CFG = 0; //Make SGEN follow RUN_PC[0]
MC_ME.PCTL255.B.RUN_CFG = 0; //Make FlexPWM0 follow RUN_PC[0]
MC_ME.RUN0_MC.R = 0x001300F4; // RUN0 cfg: IRCON, OSC0ON, PLL1ON, syclk=PLL1

//adc_ enable peri clock for all RUN modes
MC_ME.RUN_PC[1].R = 0x000000FE; // enable peripherals run in all modes
MC_ME.PCTL126.B.RUN_CFG = 0x1;
MC_CGM.AC0_DC2.R = 0x80040000; //Enable ADC_CLK and divide PLL0_PHI source by 5 (i.e. 4+1)

// Mode Transition to enter RUN0 mode:
MC_ME.MCTL.R = 0x40005AF0; // Enter RUN0 Mode & Key
MC_ME.MCTL.R = 0x4000A50F; // Enter RUN0 Mode & Inverted Key
while (MC_ME.GS.B.S_MTRANS) {}; // Wait for mode transition to complete
while(MC_ME.GS.B.S_CURRENT_MODE != 4) {}; // Verify RUN0 is the current mode

// set peripheral clocks
MC_CGM.AC0_SC.R = 0x02000000; // Select PLL0 for auxiliary clock 0
MC_CGM.AC0_DC0.B.DE = 1;
MC_CGM.AC0_DC0.B.DIV = 1; // MOTC_CLK : Enable aux clk 0 div by 1 
MC_CGM.AC0_DC2.B.DE = 1;
MC_CGM.AC0_DC2.B.DIV = 3; // ADC_CLK : Enable aux clk 0 div by 3  (80 MHz)


MC_ME.DRUN_MC.R = 0x00130072;
MC_ME.MCTL.R = 0x30005AF0;
MC_ME.MCTL.R = 0x3000A50F;
while(MC_ME.GS.B.S_MTRANS == 1); /* Wait for mode transition complete */
}

 

 

/*******************************************************************************
Function Name : SUIL2_Init
Engineer : Martin Kovar
Date : Dec-29-2015
Parameters : NONE
Modifies : NONE
Returns : NONE
Notes : SIUL2 initialization (ports),
Issues : NONE
*******************************************************************************/
static void GPIO_Init(void)
{
SIUL2.MSCR[LED1_pin].R = 0x32000000; //PC[11] GPIO - Red LED
SIUL2.GPDO[LED1_pin].R = 0x00000001;

// SIUL2.MSCR[55].R = 0x02000000; // D[7] pin as SGEN output

SIUL2.MSCR[11].R = 0x02800002; // A[11] pin as FlexPWM A[0] output
SIUL2.MSCR[10].R = 0x02800002; // A[10] pin as FlexPWM B[0] output

 

}


/*******************************************************************************
Function Name : ETimer_Init
Engineer : Martin Kovar
Date : Jan-12-2016
Parameters : NONE
Modifies : NONE
Returns : NONE
Notes : ETimer0 channel 0, count mode for delay, Primary source is MOTC_CLK divided by 128
Issues : NONE
*******************************************************************************/
static void ETimer_Init(void)
{
ETIMER_0.ENBL.R = 0x0; // disable Timer0 channels
ETIMER_0.CH[0].CTRL1.R = 0x3E40; // Counts only rising edge of the MC_CLK (160MHz in RUN0), divide by 128, count up, count repeatedly, count until compare, then reinitialized
ETIMER_0.CH[0].COMP1.R = 0x007c; // Compare value for 1 second delay (160MHz/2 = 80MHz)
ETIMER_0.CH[0].INTDMA.R = 0x0002; // enable interrupt for COMP1
ETIMER_0.CH[0].CCCTRL.R = 0x0240; // compare on COMP1 when counting up, CAPT1 on rising edge,
ETIMER_0.ENBL.R = 0x0003; // Enable Timer0 channel

}


//416.7k
/*******************************************************************************
Function Name : ETimer_ISR
Engineer : Martin Kovar
Date : Jan-12-2016
Parameters : NONE
Modifies : NONE
Returns : NONE
Notes : ETimer interrupt routine
Issues : NONE
*******************************************************************************/
/*
void ETimer_ISR(void)
{

ETIMER_0.CH[0].STS.R = 0x0002; //clear interrupt flag
SIUL2.GPDO[LED1_pin].R = ~SIUL2.GPDO[LED1_pin].R; //toggle with pin (LED blinking)
etimer_cnt++;

}*/

void ADC_ISR(void)
{
ADC_1.ISR.R = 0x0000001f;//clear Endof CTU INT Service Routine
//SIUL2.MSCR[PE12].B.APC = 1; //Configure ADC1_AN6 to analog pad control function. Analog is default function so SSS says 0

//ADC_1.NCMR0.B.CH6 = 1; //Enable channel 6 for normal conversion on ADC1
//result[3] = ADC_1.CDR[6].B.CDATA; //Read ADC1_AN6 conversion result data


adc_count++;
}


static void FlexPWM_Init(void)
{
/* Submodule 0 Initialisation */
FlexPWM_0.OUTEN.R = 0x110; // enable A and B outputs on submodule 0

FlexPWM_0.SUB[0].CTRL1.R = 0x0400|(PWM_PRESCALER<<4); // full cycle reload, every opportunity
FlexPWM_0.SUB[0].CTRL2.R = 0xA000; // independent outputs, debug enable
FlexPWM_0.SUB[0].DTCNT0.R = 0x0000; // deadtime values
FlexPWM_0.SUB[0].DTCNT1.R = 0x0000;
//FlexPWM_0.SUB[0].INIT.R = 0x1;
FlexPWM_0.SUB[0].VAL0.R = 0x0; // PWM start
FlexPWM_0.SUB[0].VAL1.R = PWM_MODULO; // PWM A0 max
FlexPWM_0.SUB[0].VAL2.R = 0x0; // out_trig  (trigger points for CTU MRS event)
FlexPWM_0.SUB[0].VAL3.R = PWM_MODULO*Duty; // PWM A0 falling edge
FlexPWM_0.SUB[0].VAL4.R = PWM_MODULO*Duty; // PWM B0 rising edge
//FlexPWM_0.SUB[0].VAL5.R = 0x0; // PWM B0 falling edge


/* FlexPWM_0.SUB[0].INIT.R = 0x1;
FlexPWM_0.SUB[0].VAL1.R = PWM_MODULO; // PWM modulo
FlexPWM_0.SUB[0].VAL2.R = PWM_MODULO*Duty; // PWM A0 rising edge
FlexPWM_0.SUB[0].VAL3.R = 0x1; // PWM A0 falling edge
FlexPWM_0.SUB[0].VAL4.R = 0x1; // PWM B0 rising edge
FlexPWM_0.SUB[0].VAL5.R = PWM_MODULO*Duty; // PWM B0 falling edge*/

FlexPWM_0.SUB[0].DISMAP.R = 0x0000; // disable fault pin condition

FlexPWM_0.MCTRL.B.LDOK = 0x1; // Load the PRSC bits of CTRL1 and the INIT, and VALx registers into a set of buffers Load OK

//for CTU
FlexPWM_0.SUB[0].TCTRL.B.OUT_TRIG_EN = 3; // Output Trigger Enables (OUT_TRIG_EN2 = 1 )
FlexPWM_0.MCTRL.B.RUN = 0x1; // Run PWM


}

void CTU_Init(void)
{
//Select the input trigger source (master reload interval) for CTU module and clock for CTU module
CTU_0.TGSISR.B.I0_RE = 0x1; // Select the MRS for CTU - PWM reload - period 50usec
CTU_0.CR.B.TGSISR_RE = 0x1; // TGS Input Selection Register Reload Enable
CTU_0.TGSCR.B.ET_TM = 0; // pulse mode
CTU_0.TGSCR.B.TGS_M = 0; // sequential mode
CTU_0.TGSCR.B.PRES = 0x0; // CTU prescaler is set to 1

//Fill CTU trigger compare registers. (In our case only 1 register (T0CR) is filled with value 1).
//As soon as counter reaches value 1, the time trigger from TGS (trigger generator submodule) is linked to one ADC command sequence trigger.
//ADC command sequence trigger points to the first command in the command list.
CTU_0.TCR[0].R = 0x1; // CTU Timer compare register 0 value

//Counter will stop and wait for reload trigger from PWM at value 0xFFFF.
CTU_0.TGSCCR.R = 0xFFFF; // TGS Counter Compare Register

//Counter is starts to count from 0 after reload.
CTU_0.TGSCRR.R = 0; // TGS Counter Reload Register

//Enables Trigger 0 and enables ADC command output.
CTU_0.THCR1.B.T0_E = 1; // Trigger 0 output enable
CTU_0.THCR1.B.T0_ADCE = 1; // Trigger 0 ADC Command output enable
CTU_0.CLCR1.B.T0_INDEX = 0; // Trigger 0 command list - first command address

//FIFO DMA control register (FDCR) setting.
(*(volatile uint16_t *)0xFFE0C06C) = 1; // CTU.FDCR = 1 - ebable DMA on FIFO (missing in header file!)
CTU_0.FCR.R = 0; // FIFO control register

//The example of ADC command sequence list is presented on Figure 7 - CTU ADC command
//sequence list. Select the ADC module and channels to be converted as shown below in example
//code. End the command list with the additional command with value 0x4000 to stop execution of next
//commands.
// CTU triggers ADC - ADC command list
// SU : ADC command list
CTU_0.CLR[0].A.R = 0x0; // ADC_0 module, channel 0 First command - CTU starts sending commands to ADC after this command
CTU_0.CLR[1].A.R = 0x1; // ADC_0 module, channel 1
CTU_0.CLR[2].A.R = 0x2; // ADC_0 module, channel 2
CTU_0.CLR[3].A.R = 0x3; // ADC_0 module, channel 3
CTU_0.CLR[4].A.R = 0x4; // ADC_0 module, channel 4
CTU_0.CLR[5].A.R = 0x5; // ADC_0 module, channel 5
CTU_0.CLR[6].A.R = 0x6; // ADC_0 module, channel 6
CTU_0.CLR[7].A.R = 0x7; // ADC_0 module, channel 7
CTU_0.CLR[8].A.R = 0x8; // ADC_0 module, channel 8
CTU_0.CLR[9].A.R = 0x9; // ADC_0 module, channel 9
CTU_0.CLR[10].A.R = 0xA; // ADC_0 module, channel 10
CTU_0.CLR[11].A.R = 0xB; // ADC_0 module, channel 11
CTU_0.CLR[12].A.R = 0xC; // ADC_0 module, channel 12
CTU_0.CLR[13].A.R = 0xD; // ADC_0 module, channel 13
CTU_0.CLR[14].A.R = 0xE; // ADC_0 module, channel 14
CTU_0.CLR[15].A.R = 0xF; // ADC_0 module, channel 15
CTU_0.CLR[16].A.R = 0x4000; // First command - this command is not send to ADC

//Set FIFO threshold for 0xE so the eDMA transfer will be triggered automatically when FIFO reached
//depth of 15, measured results will be transferred automatically by eDMA state machine.
CTU_0.FTH.B.TH0 = 0xE; // FIFO 0 Threshold. Maximum value of 15, as the threshold value must be less than the number of FIFO 0 entries.

//In case the interrupt on FIFO overflow is needed enable also FIFO overflow interrupt in FCR register.
CTU_0.FCR.B.OF_EN0 = 1; // FIFO 0 threshold Overflow interrupt enable - read FIFO 0 in this interrupt

//In order to guarantee the coherency, the reload of all double-buffered registers is enabled by setting GRE (General Reload Enable) bit in the CTU Control Register.
//The user must ensure that all intended double-buffered registers are updated before a new MRS occurrence.
CTU_0.CR.B.TGSISR_RE = 1; /* MRS signal을 발생 시킬꺼냐? Reload Enable on PWM event */
CTU_0.CR.B.GRE = 1; // General Reload Enable
}//CTU_Init


void DMA_Init (void)
{
//EDMA.CR.R = 0x00000002; /* Enable debug mode */
DMA_0.EEI.R = 0x00000000; /* Error Interrupt disabled for all channels */
DMA_0.ERQ.R = 0x11111111; /* Enable eDMA request 0 -> CTU FIFO_0 trigger */
//DMA_Init

}
void DMA_TCD_0(void)
{
(*(volatile uint16_t *)0xFFF4501C) = 0x0; //Clear DMA.TCD[0]0.WORD7

//Select the source address for transfer. The data will be transferred from CTU FIFO_0.
DMA_0.TCD[0].SADDR.R = 0xFFE0C080; /* Source Address - CTU FIFO_0 */

//Select destination address where the data from CTU FIFO_0 will be transferred
DMA_0.TCD[0].DADDR.R = (uint32_t) &result[0]; /* Destination Address - SRAM */
DMA_0.TCD[0].ATTR.B.SMOD = 0x0; /* Source Address Modulo */
DMA_0.TCD[0].ATTR.B.DMOD = 0x0; /* Destination Address Modulo */
DMA_0.TCD[0].ATTR.B.SSIZE = 0x2; /* Source Transfer Size: 32 bits*/
DMA_0.TCD[0].ATTR.B.DSIZE = 0x2; /* Destination Transfer Size: 32 bits*/

//Read always from the same source address, because of FIFO buffer.
DMA_0.TCD[0].SOFF.R = 0x0; /* Signed Source Addr Offset adjustment*/

//Transfer 64 bytes in minor loop.
DMA_0.TCD[0].NBYTES.MLNO.R = 0x40; /* Inner 'minor' byte count */
DMA_0.TCD[0].SLAST.R = 0x0; /* Last signed Source Address Adjust */

//Set destination address offset to 4 bytes.
DMA_0.TCD[0].DOFF.B.DOFF = 0x4; /* Signed Destination Address Offset */
//After major loop completion decrement destination address by 64 bytes. This will set the destination address to beginning of the result buffer
DMA_0.TCD[0].DLASTSGA.R = 0xFFFFFFC0; /* Signed Destination Address Offset -64 */
DMA_0.TCD[0].BITER.ELINKYES.B.ELINK = 0x0; /* Channel-to-channel linking on Minor Loop Complete: Disabled*/ // ??

//Used is one major loop.
DMA_0.TCD[0].BITER.ELINKYES.B.LINKCH = 0x1; /* Current Major Iteration Count or Link Channel Number */
DMA_0.TCD[0].CITER.ELINKYES.B.ELINK = 0x0; /* Channel-to-channel linking on Minor Loop Complete: Disabled*/
DMA_0.TCD[0].CITER.ELINKYES.B.LINKCH = 0x0; /* Channel Number for Channel-to-Channel Linking on Minor Loop : Not Complete*/
DMA_0.TCD[0].CITER.ELINKYES.B.CITER = 0x0001; /* Current Major Iteration Count or Link Channel Number */
DMA_0.TCD[0].CSR.B.BWC = 0x00; /* Bandwidth control */
DMA_0.TCD[0].CSR.B.MAJORLINKCH = 0x00; /* Major Channel number */
DMA_0.TCD[0].CSR.B.MAJORELINK = 0x00; /*Channel-to-channel Linking on Major Loop Complete: Disabled*/
DMA_0.TCD[0].CSR.B.DONE = 0x00; /* Channel Done bit */
DMA_0.TCD[0].CSR.B.ACTIVE = 0x00; /* Channel Active bit */
DMA_0.TCD[0].CSR.B.ESG = 0x00; /* Enable Scatter/Gather: Disabled*/
DMA_0.TCD[0].CSR.B.DREQ = 0x00; /* Disable the DMA channel when Done: Disabled*/
DMA_0.TCD[0].CSR.B.INTHALF = 0x00; /* Interrupt on Half Major Count completion: Disabled*/
DMA_0.TCD[0].CSR.B.INTMAJOR = 0x01; /* Interrupt on major loop completion: Disabled*/
DMA_0.TCD[0].CSR.B.START = 0x00; /* Explicit Channel Start bit */ //eDMA
}

//////////////////////////////////////////////////////////////////
static void ADC_Init(void)
{

//ADC_0.MCR.R = 0x80020000; // enable result overwriting, enable CTU triggered injected conversion
//ADC_0.CTR0.R = 0x00000016; // setup conversion time, use default value
//ADC_1.MCR.B.PWDN = 0x1; // Enter power down state

//from 誘쇳샇�삎 肄붾뱶
ADC_1.MCR.B.PWDN = 0x1; /* Enter power down state */
ADC_1.MCR.B.ABORT =0x1; // Abort all conversion in process

/* ADC0 Pads conf. */

// SIUL2.MSCR[29].R = 0x2000; // B[13] : ANP0 : Current2
// SIUL2.MSCR[30].R = 0x2000; // B[14] : ANP1 : Current3
//SIUL2.MSCR[31].R = 0x2000; // B[15] : ANP2 : Current1

/* ADC Configuration Start */
//ADC_0.MCR.R = 0x00000000; /* Initialize ADC0(Main Configuration Register) for One shot mode */
ADC_1.ISR.R = 0x0000001F; /* Clear all interrupt status flags */

/* Sampling Timing Setting */
//CTR0 : ADC 0 - 14 channel, Tck = (1/2 * ADC peri Clock) : ADC 120Mhz PLL Clock --> ref 8.4.4
//ADC_1.CTR0.B.INPLATCH = 1; //INPLATCH값에 따라 값 latch하는 clock이 변함 Fig23 in page 150 참조
// ADC_1.CTR0.B.INPCMP = 3; //Tbiteval = INPCMP * Tck = 3 * 1/60MHz = 50nsec
ADC_1.CTR0.B.INPSAMP = 0x14; //Tsample = (INSAMP - 1) * Tck (INSAMP가 8보다 큰 경우) = 19 * 1/60MHz = 316nsec
//Teval = 12 * Tbiteval
// Total Conversion duration : Tconv = Tsample + Teval + Tck

ADC_1.MCR.B.PWDN = 0; /* Exit from power down */
ADC_1.PDEDR.R = 0x00000000; /* Power down reset이후 얼마 지연 시간뒤에 실제 power down에서 빠져 나올 것인가? : 0 clock Cycle */
ADC_1.MCR.B.CTUEN = 0x1; /* Cross Triggering Unit for ADC0(injected Conversion): Enabled */

/*ADC Interrupt Mask */
ADC_1.IMR.B.MSKEOCTU = 1; //CTU가 완료되면 호출?
// ADC_0.IMR.B.MSKEOC = 1; /* End Of Chain INT */
//ADC_0.IMR.B.MSKECH = 1;

// ADC_0.CIMR0.B.CIM2 = 1; /* Channel 2 */
ADC_1.CIMR0.B.CIM1 = 1; /* Channel 1 */
//ADC_0.CIMR0.B.CIM0 = 1; /* Channel 0 */
INTC_0.PSR[82].R = 0x01; /* ADC Interrupt priority 8 */

/* ADC Configuration Stop */
ADC_1.MCR.B.ABORT =0x0; /* do not abort ongoing conversion */
///////
}
////////////////////////////////////////////////////////////

 


__attribute__ ((section(".text")))
int main(void)
{
int counter = 0;

HW_Init();
CTU_Init();
ADC_Init();
//ADC_ISR();
ADC1_PadConfig_ChanSelect(); /* Configure ADC pads & select scan channels */
ADC1_Calibration(); /* Calibrate to compensate for variations */

 

INTC_0.PSR[611].R = 0x8001; //set interrupt priority

ETimer_Init();
FlexPWM_0.MCTRL.B.RUN = 0x1; // Submodule 0 PWM generator enabled

/* Loop forever */

while (1)
{
counter++;
}

return 0;
}

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