Problems in ISR of serial communication interface (SCI) - MC9S08GB60

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Problems in ISR of serial communication interface (SCI) - MC9S08GB60

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santhu
Contributor I
hi
   I'm using MC9S08GB60 8 bit controller (HCS08 family).In that i have a problem in clearing the TDRF (transmitt data register empty).At the beginning itself this TDRF flag will set,so my code goes to ISR of transmitt section.I did  2 steps of clearing the TDRF by reading the status register when TDRF is set and then i write in SCI data register (SCID).But i unable to clear that flag,without clearing this i can't comeout of ISR.Can you suggest me for this problem. 
 
Note:TDRF flag will set when transmitt data register empty.
         In the data sheet they told the 2 steps of clearing the TDRF flag that i mentioned above.
        
 
With regards
 santhosh


Message Edited by NLFSJ on 2008-11-13 01:50 PM
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peg
Senior Contributor IV
Hi  santhosh,

The method you are describing is correct! (It is really quite simple).
If you have a lot of bytes to send then the TDRE (not TDRF) bit is only clear for an instant as you make it full again in the interrupt.
Also if the SCI is not setup properly (TE set) the bytes won't shift out and you will end up with it not setting.

Normal code for this never actually checks for the flag to be clear anyway.
If using polling you check for it to be set and write to SCID.
If using interrupts there is no need to test it at all. Being set triggers the interrupt automatically and in the interrupt you simply read SCISC and write to SCID.

I think we will need to see your code to take this further.

P.S. Remember that this bit is an indicator for the buffer and not the shift register. Under certain conditions the byte will fall straight through the buffer into the shift register and so even though you write to SCID the TDRE will not necessarily clear.



Message Edited by peg on 2008-11-14 08:55 AM
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lwoodham
Contributor I
Hey all,

I have experienced the same issue as described here, ie how do you stop the interrupts from occuring after the last byte is loaded into SCID if you are using the TDRE flag to generate interrupts.  The last byte will also trigger an interrupt when TDRE goes high so it seems to me that the best way to handle this is by disabling the interrupt(set TIE = 0) in the interrupt after loading the last byte into SCID.  Comments please.



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peg
Senior Contributor IV
Hello and welcome to the fora, Iwoodham,

Seems to me your method would work fine.
In fact if you still require other interrupts it would seem like the ONLY method other than completely disabling the transmitter.
Are you having problems doing it this way?

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lwoodham
Contributor I
No, that method worked for me and I'm up and running. I believe this is the correct way to use the interrupts. All you need to do is make sure that TDRE is set to 1 before loading another character into SCID and turn the interrupt off after loading the last character into SCID . Thank you for your welcome to the forum.  I am impressed with the speedy reply to my post and I love the e-mail feature that alerted me to your reply. Happy Thanksgiving.

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Lundin
Senior Contributor IV
How do you know it isn't cleared? Note that if you view these registers from a debugger, the debugger is -reading- them, which can mess up the flags. Did you try to run the program without a BDM connected?

If this isn't the problem, please post the code.
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