We have trouble getting our SDIO interface to an external Wifi Module to function stably. Everything points to a timing issue, as we can influence the error rate by cooling/heating the processor. The interface has a tuning mechanism to add delay to the receiving clock but we are unsure if this works correctly.
There is one register (uSDHCx_CLK_TUNE_CTRL_STATUS) that could help us but that register is a read only which will always just return the power-reset value, which makes it completely useless.
Is there another way to get some information about the tuning results (not only success/fail)?
How much of the tuning process is handled by software and what is handled automatically be hardware?