AnsweredAssumed Answered

CPMEM control registers

Question asked by Jean Mitchel on Jun 17, 2017
Latest reply on Jun 18, 2017 by Yuri Muhin



i found a similar post in this forum, yet no answer was provided.


In IMX6DQRM.pdf I am trying to find where the CPMEM registers (there should be a total of 2*5*80 registers of 32bit per IPU).


With debug enabled, dmesg prints the following:

Jun  8 13:54:10  kernel: imx-ipuv3 2400000.ipu: initializing idma ch 21 @ c0900540.


0x0240_0000 is the base address of IPU1, despite 37.5 IPU Memory Map/Register Definition placing at at 0x0260_0000


0xC090_0540 seems to be the offset for -probably- the first REGISTER for the CPMEM for IDMA channel 21 in IPU1.


I would hence expect channel 0 on 0xC090_0000. This may be the virtual address of course, otherwise I can not relate this to IPU1 at all.


However, i do not find CPMEM at all in 37.5 IPU Memory Map/Register Definition. Could you point to it? In other posts the reply is "use this address it works", but i would like to find it in documentation".






Jean Mitchel