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P1024 GPCM mode

Question asked by Arun P on May 20, 2017
Latest reply on May 22, 2017 by Arun P


I am using P1024 in my design. In that I have connected 16 bit NOR flash (for booting on CS0#) and an 8 bit Non Volatile memory on the local bus (LPC). Both memory  are working in the GPCM mode of the LPC bus. The NOR flash is configured for the 16 bit GPCM mode and NV Memory is configured in the 8bit GPCM mode. For NOR Flash I am using a demultiplexer  (latch) since flash memory uses the address signals from LA30 (since it is in 16 bit configuration) to LAD8 for address selection and LAD15- LAD0 for data. But for NV Memory the address used are from LA31 (since it is in 8 bit configuration) to LAD12 and LAD0-LAD7 for data, so should I use the multiplexer here also to demultiplex the address and data, there is no common signals in the address and data phase. In 8 bit mode, during the data phase (after the ALE is toggled) will  the signals LA31 to LAD8 be there intact without changing the state? The NV memory require the address signals in the same state for entire duration of the read or write cycle.

Kindly clarify.