Currently we are using eMMC memory and its powered through SW1A switcher output of PMIC.
PMIC also supports a dedicated LDO with output called VCC_SD.
In order to reduce load SW1A rail, can I use VCC_SD to power eMMC. Wont it impact the power up/down sequencing of the CPU(i.MX6UL).
Both supply rails are are of 3.3V.