we are having problems with an LPC17xx ethernet PHY interface. According to the PHY datasheet the MDIO pin should change values on the falling edge of the MDC pin and they are sampled by the PHY at the rising edge. On our LPC1768 the MDIO pin changes on the rising edge and communication with the PHY is not possible. System clock is 64MHz and clock divider used is 48.
Can somebody confirm the clock polarity? Is there any register where the clock polarity can be changed? I could not find anything in the GPIO or Ethernet control registers.
Any help / hint would be appreciated.