Inconsistent reset value of registers FLASHCFGA - FLASHCFGB

[jeremyzhou]

Hi,

my customer reports different rest value of flash accelerator registers compared to documentation.

silicon por value reads as 0x8000423A but documentation UM10503 V2.1 says it should be 0x8000F03A

According to documentation the value we read from the chip should be good only up to 107 MHz, but this value actually works up to 180MHz.

Documentation suggest value of 0x8000803A for 180 MHz "without touching the three least significant nibbles " that anyway are 0x32A and not as documented 0x03A.

The Question is : for 180MHz operation is the silicon reset value ok or not ?

Thanks

BR

[rolfmeeser]

The initial value of FLASHCFGA/FLASHCFGB as seen by the application is indeed 0x80000423A, not 0x8000F03A as shown in the user manual. This will be corrected in the next revison of the manual.

This initial value is set by the boot ROM for its 96 MHz operation, and is safe up to a clock frequency of 107 MHz. While there may be enough margin to run at 180 MHz with this setting under fortunate circumstances, it is by no means safe to do so. With FLASHTIM=4 the device will be unreliable when operating at 180 MHz.

For a 180 MHz clock you want to set FLASHCFGA/FLASHCFGB to 0x8000823A.

[michael14]

The post is from 2016. Six years later UM10503 version 2.5 still has the reset value as 0x8000 903A. Is there a reason this has not been corrected?

[pablo_86]

I am currently working with a LPC1857 and have the following questions:

1. in the CREG registers there is a register FLASHCFGA (address 0x4004 3120) which should contain 0x0x8000F03A as reset value (according to UM10430, Rev. 2.2). But when I read the register before writing I get the following value: 0x8000423A. Why does this value not correspond to the default value as described in the user manual? What is the right default value for LPC1857?
2. During my firmware project development the first 12bits of the FLASHCFGA register were set to 0. My firmware runs fine although the user manual tells me not to change these bits!? But if I now set the first 12bits to the reset value as described in user manual, I have problems with accessing the external SDRAM via EMC.

         Additional info: The problem only occurs at temperatures below 0°C.

What is the relation here between FLASHCFGA (bit 11:0) and accesses to the SDRAM via EMC?