Problem with LPCXpresso Display of NVIC Registers

[lpcware]

Content originally posted in LPCWare by Sal Ammoniac on Sun Sep 21 09:52:16 MST 2014
I have LPCXpresso 7.3.0, an LPC-Link 2, and a LPC4357 board.

I write to the NVIC NVIC_IPR0-NVIC_IPRxx registers to set interrupt priority of the peripherals (SSP, I2C, etc.) I use. When I look at the NVIC registers by selecting "NVIC" from the "Peripherals" window, it appears that most of the IPR registers that I set are still zero. Some of them, however, do reflect what I wrote. If I right-click and select "refresh", the registers do not change and several of them still display "0" despite being written with another value.

If I programatically read back the IPR registers, they do reflect the values that I wrote to them, so I know that I'm writing them correctly -- LPCXpresso is just not displaying them correctly.

The same issue applies to the System Handler Priority registers. I write them to set the interrupt priority of the Systick and PendSV interrupts, yet when I look at those registers with LPCXpresso, I can see that only the register corresponding to PendSV shows the value I wrote to it -- the register for Systick still displays "0" even though I've verified that the value I wrote is actually set.

Is this a known problem? When is it going to be fixed?

[lpcware]

Content originally posted in LPCWare by lpcxpresso-support on Thu Nov 06 06:35:00 MST 2014

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Quote: lpcxpresso-support
This has been fixed for the next LPCXpresso release (expected in November)

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Fix included in LPCXpresso 7.5.0 which  is now available.

Regards,
LPCXpresso Support

[lpcware]

Content originally posted in LPCWare by lpcxpresso-support on Mon Oct 06 23:34:01 MST 2014
This has been fixed for the next LPCXpresso release (expected in November)

Regards,
LPCXpresso Support

[lpcware]

Content originally posted in LPCWare by starblue on Tue Sep 23 00:38:08 MST 2014
An issue with LPC43xx might be that it is multicore, and each core has its own NVIC.

[lpcware]

Content originally posted in LPCWare by lpcxpresso-support on Mon Sep 22 02:43:14 MST 2014
After some more testing, I think that there may indeed be an issue with the display of byte wide registers in the NVIC on most CM3/CM4 based MCUs. We'll investigate this further.

As whitecoe highlights, the way values are stored in these registers is "interesting", particularly if you access them using the CMSIS header functions (which do the necessary shifting automatically "behind your back"). However I don't believe this is the issue being seen with the Peripheral View in this case.

Regards,
LPCXpresso Support

[lpcware]

Content originally posted in LPCWare by whitecoe on Mon Sep 22 01:09:01 MST 2014
You do have to watch priorities on Cortex MCUs, it is very easy to get confused! There is quite a bit of stuff around on the web on this, for example:

http://embeddedgurus.com/state-space/2014/02/cutting-through-the-confusion-with-arm-cortex-m-interru...

HTH!

[lpcware]

Content originally posted in LPCWare by lpcxpresso-support on Mon Sep 22 00:35:00 MST 2014
Please post *YOUR* code and screenshots showing the problem... When we write to the registers and display the values, it works exactly as expected...

[lpcware]

Content originally posted in LPCWare by Sal Ammoniac on Sun Sep 21 23:07:23 MST 2014
Reproduction is straightforward: just write to the NVIC's IPRx registers and then view them in the "NVIC" view selected from "Peripherals". It'll be obvious that the display is not showing the values that were written. Ditto for the System Handler priority registers.

[lpcware]

Content originally posted in LPCWare by lpcxpresso-support on Sun Sep 21 11:49:00 MST 2014
This is not a known problem.

As we will need to reproduce it here, to investigate, please provide exact details on how to reproduce, including any code/projects you are using to set the registers.