I'm refreshing this topic, because I have the same problem on the DZ60. The simulator says that a COP reset occurs during the mass erase operation, even when it is disabled (writing #$08 to FSTAT register). At the exact cycle that the mass erase should be completed (20000 cycles @192.3kHz) COP reset occurs. Everithing is OK if I execute 128 subsequent sector erases, completely erasing it step by step.
Why the COP reset occurs when it is disabled in the initialization process, way before the main program???????
Why I have no problem performing 128 subsequent erases instead????
It is not a vector erasing problem, because I'm trying to erase EEPROM; it has a separate array from Flash and them "erase independently of each other".
Can anyone help me to find out the solution at this little dilemma ?
Hello,
I question whether FCS mode is capable of simulating any of the flash operations.
Regards,
Mac
Cyril G. wrote:When you say that vector erasure would be a rather precarious situation, do you mean that we can not erase and reprogram them? If not, i have to rethink my in-chip programmability.Unfortunately, I can't move the updatable portion of the code to flash2 because I have to update most of the source code ( including the interrupts vectors if possible) and it wouldn't fit in flash 2.
It just occurred to me that, within the mass erase function, you appear to be restoring the interrupt enable state that existed prior to calling the function. This could be bad news if previously the interrupts had been enabled. Surely interrupts should remain disabled untill after re-programming takes place, and the interrupt vectors are re-programmed.