CAN config

[lpcware]

Content originally posted in LPCWare by prancius on Tue Sep 18 11:28:02 MST 2012
Hello,

I am looking info for CAN config.
I have run "CAN on CHIP" example with little modifications and everything runs as expected.

Now i am try to find how to config BRP, PHSEG1, PHSEG2, PRSEG, SJW, SAM values?

I have read datacheet of LPC11C24 abd can find any nformation about registers. Seems i do not understand something.

Regards,
Pranas

[lpcware]

Content originally posted in LPCWare by Ex-Zero on Tue Sep 18 12:13:55 MST 2012
As descibed in http://knowledgebase.nxp.com/showthread.php?t=2829:

There are 3 time segments:

#1: TSJW   (1-4)
#2: TSEG1  (2-16)
#3: TSEG2  (1-8)

TSEG1-2 are dividing your CAN signal (=every damned bit) to measure it.  Together they determinate your  NT (Nominal bit time) = TSEG1_val +  TSEG2_val + 3

Note:  To avoid confusion I've added '_val' to show register values. As mentioned in UM, hardware is often reading them + 1
       Sample: BRP_val = 0    means BRP = 1
Quote: Hardware interprets the value programmed into these bits as the bit value + 1.

Sample: Default setting is 0x2301 for 500kBit/s with 8MHz.

As described in 'Table 185. CAN bit timing register (CANBT)' that's:

BRP_val   = 1 (bit5:0)  -> BRP   = 2
SJW_val   = 0 (bit7:6)  -> SJW   = 1
TSEG1_val = 3 (bit11:8) -> TSEG1 = 4
TSEG2_val = 2 (bit14:12)-> TSEG2 = 3

The trick with this settings is to generate a divisible sum with (TSEG1 + TSEG2 +1).In this sample this sum is 8 :eek:

To calculate your Baud rate you just have to:

#1: divide your main clock by SYSAHBCLKDIV(usually 1) to get system clock

#2: divide your system clock by CAN clock divider register (CANCLKDIV),  which is usually used to divide to a standard clock like 8MHz.

#3: divide by CAN baud rate prescaler extension register (CANBRPE), which is usually 0 (= divider:1).

#4: divide by (TSEG1 + TSEG2 +1)*(BRP) to get your Baud Rate

That's together:

CAN Baud rate = (main clock)/SYSAHBCLKDIV/(CANCLKDIV_val+1)/(CANBRPE_val+1)/(BRP_val+1)/(TSEG1_val + TSEG2_val +3)

If setting of (main clock)/SYSAHBCLKDIV/(CANCLKDIV_val+1)/(CANBRPE_val+1) is 8MHz already, calculating CANBT is easy:

CAN Baud rate = 8MHz / (BRP_val+1)/(TSEG1_val + TSEG2_val +3)

Now we understand why this sum (TSEG1_val + TSEG2_val +3) is 8.

CAN Baud rate = 8MHz / 8 / (BRP_val+1) = 1MHz / (BRP_val+1)

With BRP_val = 1 we get 0.5MBit/s :rolleyes:


Next task: 1MBit/s with 12MHz

#1 With CANCLKDIV=1 and CANBRPE=1 we still have 12MHz to calculate CANBT

#2 We select a nice (TSEG1_val + TSEG2_val +3) sum of 6:  SJW_val=0 TSEG1_val=2 TSEG2_val=1. That's CANBT = 0x12xx.

#3 With 12MHz / 6 = 2MHz we just have to divide by 2 for 1MBit/s. So BRP=2 and BRP_val =1.

#4 Result: CAN_BT = 0x1201 :)

// Initialize CAN Controller  @12MHz
uint32_t ClkInitTable[2] =
{
  0x00000000UL, // CANCLKDIV: /1 = 12MHz
  0x1201UL      // CAN_BTR: 1000khz
};


If you want to read more about this issue, read BOSCH C_CAN User's Manual  : https://www.silabs.com/Support%20Documents/TechnicalDocs/Bosch_CAN_Users_Guide.pdf