Losing data when waking up from Deep Sleep mode ?

[lpcware]

Content originally posted in LPCWare by Flexi on Mon Jun 30 03:13:35 MST 2014
  Consider the situation as follow: after processing, MCU saves value of a variable in SRAM, then goes into Deep Sleep mode. After a particular time period, MCU wakes up and moves into Active mode. I wonder if the value of the variable will be lost or still the same as before going to sleep ? Looking forward to seeing your explanation!

[lpcware]

Content originally posted in LPCWare by Flexi on Tue Jul 01 23:51:56 MST 2014
I think I've got the answer. Queted from page 52 of the LPC11C12 user manual: "The start logic can also be used in Active mode to provide a vectored interrupt using the LPC111x/LPC11Cxx’s input pins."

[lpcware]

Content originally posted in LPCWare by Flexi on Tue Jul 01 18:54:01 MST 2014
Here  I'm gonna use Watchdog to just wake up MCU, not reset MCU.
But what about the Start Logic function, is it only effected to wake up from Deep Sleep mode or can be used in Active mode as an external edge detection trigger ?

[lpcware]

Content originally posted in LPCWare by LabRat on Tue Jul 01 04:40:38 MST 2014
LPCOpen is including samples for Watchdog and pin interrupt...

And yes, if you use WDT interrupt (for debugging), it has to be restarted. That's of course not necessary if you use WDT to reset the mcu...

[lpcware]

Content originally posted in LPCWare by Flexi on Tue Jul 01 04:01:41 MST 2014
As what I've read on user manual of LPC11C12, when Watchdog has timed out, Watchdog timer is disabled, so in order to enable Watchdog again, in the Watchdog time-out interrupt sub-routine, we have to set the WDEN again. Is that right ?
Another question is that, LPC11C12 offers the Start Logic function in order to wake up from Deep Sleep mode, so in case I want to detect edge from external signal while in Active mode (not in Deep Sleep mode), could I use this function ? because I don't find out any information about external interrupt (rising/falling edge detection interrupt) in this user manual.

[lpcware]

Content originally posted in LPCWare by Flexi on Mon Jun 30 19:07:11 MST 2014
Thank you very much, LabRat  ! I've got it !  :)

[lpcware]

Content originally posted in LPCWare by LabRat on Mon Jun 30 03:44:19 MST 2014
User manual  :) :

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Quote:
3.9.3 Deep-sleep mode
In Deep-sleep mode, the system clock to the processor is disabled as in Sleep mode. All
analog blocks are powered down, except for the BOD circuit and the watchdog oscillator,
which must be selected or deselected during Deep-sleep mode in the PDSLEEPCFG
register.
Deep-sleep mode eliminates all power used by the flash and analog peripherals and all
dynamic power used by the processor itself, memory systems and their related
controllers, and internal buses. [color=#f00]The processor state and registers, peripheral registers,
and internal SRAM values are maintained,[/color] and the logic levels of the pins remain static.

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