High Speed USB device on USB1 with external PHY

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 15, 2016 by lpcware
Content originally posted in LPCWare by royg on Tue Apr 29 16:32:48 MST 2014
Does anyone have a High Speed device working on LPC4350 USB1 with an external PHY?

Any help would be greatly appreciated.

I am using the LPC1850EVA-A4 evaluation board populated with a LPC4350.

I have attached a EVB-USB3343 eval board with a microchip USB3343 to the ULPI port with VddIO set to 3.3V.

I have set up the ULPI pins and set up USB1 as outlined in the Application Note AN11309. USB1 branch clock disabled, PTS bits set to use ULPI, allowed to connect at any speed.

I have established communication with the external PHY via the ULPI viewport register. I am able to read the PHY's read only registers and read/write to the PHY's scratch register.

I have working firmware for USB0 high speed device using the ROM USB stack and want it to work with USB1,

I can not get the External PHY to connect. The PHY's function control and OTG registers read back as if the PHY is set for "Host HS/FS Resume mode" both DP and DM are pulled down which agrees with the register settings.

If I try to force the PHY to "Peripheral HS/FS Resume Mode"  DP pulled up to signal the host that a device is attached by writing to the PHY registers when allowing to connect, it seems that the controller forces the PHY back to "Host HS/FS Mode" confirmed by reading back the registers and what I see on the bus.

I am not using P2_5 Vbus, but I am setting the Vbus active bit  in the LPC USB1_DP/USB1_DM (SFSUSB) register to tell the USB1 controller that it is active.