SGPIO help

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SGPIO help

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by khfreiberg on Wed Feb 19 11:57:51 MST 2014
SGPIO looks like a serial wonderland, but I have no idea how to use it. Is there a tool that helps?
I would like it to implement a JTAG protocol on four SGPIO pins that allow me to control my FPGA's via USB.
Bitbanging works but is slow.

I would appreciate any help.
Actually it would already help when I know that this logic can do it, since I know that I do not waste my time ;-))
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by khfreiberg on Thu Feb 27 11:13:06 MST 2014
Wow, that's a nice design.
You are right. It does exactly what I plan todo. Lot's of power for 15 bugs.
I love this Controller ;-))

Thanks again,
I have just one M0 and this one has to do USB and JTAG.
But when I can offload the JTAG stuff into hardware, that gives me a lot more headroom.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by starblue on Thu Feb 27 02:08:07 MST 2014
The schematics is on the Embedded Artists page for LPC-Link2:

http://www.embeddedartists.com/products/lpcxpresso/lpclink2.php
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by khfreiberg on Wed Feb 26 10:02:54 MST 2014
Thanks,
I do not see a schematic for the Link2 debugger. All I found is the LPCXpresso V2. I am not sure if the SWD interface has the same structure as JTAG or if it just share the pins. But anyway, I think it is worth to give it a try. I have read somewhere that you can do dual serial with SGPIO. I would be happy with 10MHz. But for now we need to understand the Xilinx communication to do it without iMPACT.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by starblue on Thu Feb 20 02:06:51 MST 2014
It seems the LPC-Link2 debugger does exactly that, in the schematics all the JTAG pins are connected to SGPIO. It's also quite fast, faster than a Ulink2.

From my personal experience with SGPIO I also think it is possible. 10 MHz JTAG clock should be doable under processor control, more if you can get DMA to work, which however seems tricky (I haven't done it).
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