LPC4337 IAP Flash Programming

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Aug 29, 2016 by Mike Cruse
Content originally posted in LPCWare by v0ynich on Wed Feb 25 14:16:32 MST 2015

I have the following problem:

By using my own bootloader, I'm able to program the LPC4337 flash.
However, in a ~45kByte code, there is almost always one page (512Bytes) missing. This page is still with all bytes -> 0xFF.
I'm 100% sure I'm not writing this page full of 0xFF.
The location of this page (is always 512byte aligned) is random (even if a reset everything before each new flashing procedure).
The pages before and after the missing one are correct.

What I do:

-> I do init IAP
-> I do disable the interrupts using __asm volatile ("cpsid i");
-> I do prepare for writing operations before erase
-> I do erase
-> I do a blank check operation
-> I do prepare for writing operations before write
-> I do write (copy ram to flash)
-> I do compare after writing

No error is reported.

If I use a low frequency clock (1000 Khz) as argument for the write operation, the compare fails as expected (there's no enough time for the flash  programming). At this momment I'm setting it as 96000 Khz (not sure if this is the correct value after reset).

When programming a ~4KBytes code, most of the time this missing page is not noticed. It seams it needs a bunch of pages writes to have at least one missing page.

What I think it's happening:
The copy ram to flash operation returns "COMMAND OK" but in fact some error occured.

Any hints ??

Thank you!