JTAG/SWD interface connection on LPC1778

Discussion created by lpcware Employee on Jun 15, 2016
Latest reply on Jun 18, 2016 by lpcware
Content originally posted in LPCWare by giusloq on Wed Apr 13 00:59:39 MST 2016
Two questions related to JTAG/SWD interface on LPC1778 device.

The User Manual (Figure 176 on page 909) shows the connection of Cortex Debug connector. The pin 10 is connected to nRESET, the general reset input of MCU. Is it correct? Should I connect pin 10 to JTAG_TRST? Is it the same?

Second question. User Manual shows a pull-up resistor on JTAG_TDO pin. It's an output from the MCU, why a pull-up should be used?