lpc1788 flash programming (IAP)

[lpcware]

Content originally posted in LPCWare by Steve on Wed Jan 11 01:27:45 MST 2012
Hello.

I use iap commands (liblpc1000.h) for write some data to flash. Everything is fine, when Fcclk < 100 MHz. When Fcclk > 100 MHz, command prepare sector to write operation return - (7)INVALID_SECTOR.
I set
PBOOST = 3; (operation up to 120 MHz is supported)
LPC_SC->FLASHCFG  =  5 << FLASHCFG_FLASHTIM_BIT; (and other value, but it is not work)
Also, I try to change AHB Matrix arbitration priorities (MATRIX_ARB). It is no effect.

Anybody know, how write to flash on Fcclk > 100 MHz?

Original Attachment has been moved to: lpc177x_8x_iap.c.zip

[lpcware]

Content originally posted in LPCWare by usb10185 on Thu Feb 23 09:44:58 MST 2012
Can you test without the debugger connected?
Maybe the BootROM is not fully executing causing the failure at >120MHz.

[lpcware]

Content originally posted in LPCWare by Steve on Thu Feb 23 05:16:37 MST 2012
Hello Lien. Thank you for answer.

I use the same code, but it is not work on Fcclk > 100 MHz. What values you set to PLL0CFG_Val, PCLKSEL_Val, EMCCLKSEL_Val in file "system_LPC177x_8x.c".

[lpcware]

Content originally posted in LPCWare by wellsk on Wed Feb 08 09:21:25 MST 2012
The u-boot IAP programmer was also tested at 120MHz.
The code for that is here: http://git.lpclinux.com/?p=uboot-2011.06-lpc17xx.git;a=blob;f=arch/arm/cpu/cortex-m3/lpc17xx/iaplib....

[lpcware]

Content originally posted in LPCWare by Lien.Nguyen on Tue Feb 07 20:32:49 MST 2012
Hi Steve,
I've tested IAP commands already. It's still ok with cclk 120MHz. I attached these files for you. Pls check if they ok for you or not. :)