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How to take eMMC out of reset (SD3_RST line active low) on i.MX6Q

Question asked by Colin Wernham on Nov 13, 2015
Latest reply on Dec 16, 2015 by igorpadykov

This is for a carrier board (similar to a stripped down hummingboard) using the uboot mx6_cubox-i config.

 

I am trying to get the uboot to access an eMMC device on SDIO3, but it remains in reset (the SD3_RST line pin remains low) even though I set the GPIO7_IO8 to be high.

From the uboot prompt I can see the device, but selecting the device with 'mmc dev 1' hangs, because the device is in reset.

 

Here's the relevant code in the uboot board_mmc_init():

 

     MX6QDL_SET_PAD(PAD_SD3_CLK__USDHC3_CLK   , MUX_PAD_CTRL(USDHC_PAD_CTRL));

     MX6QDL_SET_PAD(PAD_SD3_CMD__USDHC3_CMD   , MUX_PAD_CTRL(USDHC_PAD_CTRL));

     MX6QDL_SET_PAD(PAD_SD3_DAT0__USDHC3_DAT0 , MUX_PAD_CTRL(USDHC_PAD_CTRL));

     MX6QDL_SET_PAD(PAD_SD3_DAT1__USDHC3_DAT1 , MUX_PAD_CTRL(USDHC_PAD_CTRL));

     MX6QDL_SET_PAD(PAD_SD3_DAT2__USDHC3_DAT2 , MUX_PAD_CTRL(USDHC_PAD_CTRL));

     MX6QDL_SET_PAD(PAD_SD3_DAT3__USDHC3_DAT3 , MUX_PAD_CTRL(USDHC_PAD_CTRL));

     MX6QDL_SET_PAD(PAD_SD3_DAT4__USDHC3_DAT4 , MUX_PAD_CTRL(USDHC_PAD_CTRL));

     MX6QDL_SET_PAD(PAD_SD3_DAT5__USDHC3_DAT5 , MUX_PAD_CTRL(USDHC_PAD_CTRL));

     MX6QDL_SET_PAD(PAD_SD3_DAT6__USDHC3_DAT6 , MUX_PAD_CTRL(USDHC_PAD_CTRL));

     MX6QDL_SET_PAD(PAD_SD3_DAT7__USDHC3_DAT7 , MUX_PAD_CTRL(USDHC_PAD_CTRL));

     MX6QDL_SET_PAD(PAD_SD3_RST__USDHC3_RST   , MUX_PAD_CTRL(USDHC_PAD_CTRL));

     usdhc3_cfg.max_bus_width = 8;

     usdhc3_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);

     status |= fsl_esdhc_initialize(bis, &usdhc3_cfg);

    

     /* Assert eMMC SD3_RST (GPIO7_IO08) (active low)# */

     gpio_direction_output(IMX_GPIO_NR(7, 8), 1);

 

Any help is appreciated.

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