How to distinguish the reset caused by pulling /RESET low vs. the reset caused by power on - MC9S12DJ64

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How to distinguish the reset caused by pulling /RESET low vs. the reset caused by power on - MC9S12DJ64

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Karen
Contributor I
Hi,
 
On my project, 9S12DJ64 is used. Cosmic compiler is the compiler I am using. In my code, I need to do different actions during the reset upon the reset was caused by pulling /RESET pin down (soft reset or external reset) or power loss (i.e. power down then power on). I am not sure how can I  detect the difference. At Freescale document CRG Block User Guide, v04.05, section 5.2.3 discussed about power on reset and low voltage reset. But  at Figure 5-2 and Figure 5-3, /RESET pin was shown at the timing diagram. I also didn't know what is "Internal POR" and "Internal /RESET" means at those timing diagram. At section 3.3.4, CRG Flags Register (CRGFLG), bit PORF is power on reset flag. It said that PORF is set to '1' when a power on reset occurs. I tried to read this bit at my board, it always read back '0' no matter if I cycle the power (power down then up) or pull /RESET pin to low. I hope I can get your help on this issue.
 
Thank you very much and very appreciate for any suggestion / comment.
 
Best,
 
Added p/n to subject.
 
Karen Shi
  


Message Edited by NLFSJ on 2007-12-05 03:58 PM
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Xbot
Contributor II
try copying PORF to another variable before leaving the reset vector. I believe this flag gets updated all the time. try to monitor the variable afterwards...
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Lundin
Senior Contributor IV
This can only be done by external electronics. As far as I know, the flags in the HCS12 registers aren't smart enough to distinguish between POR and external reset. There is no flag for low-voltage reset on the D family, since it lacks an internal voltage supervisor (LVI).

There are several ways to solve this with external electronics. A smooth way which doesn't require additional components is to not connect external resets to the reset pin, put instead to an IO pin on the cpu, preferably one with "keyboard wake-up" interrupt. When a falling edge is detected on this pin, set a flag in a variable. If reset speed is most important, allocate the variable in "NO_INIT" RAM, ie RAM that isn't initialized at startup. If reliable indication is most important, allocate it in EEPROM. When the value has been written to the flag variable, write rubbish to the ARMCOP register to force a cpu reset.

After reset, you will end up in the "COP failure reset" isr rather than the common reset isr. Check the flag variable to see if you got there by a common COP reset or by the COP reset caused by the falling edge. The reset time is quick so the RAM is almost guaranteed to be preserved, though in a safety-critical system you might want to go with the EEPROM solution instead.

Message Edited by Lundin on 2007-12-06 08:47 AM
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Xbot
Contributor II
-- a way you will know that you've done a reset and not a power-off is to declare a flag (variable) but there is no need for this since it is already their (PORF). reset tends to retain the value of the flag while power-off (suspended for a while) will reset all values of the variables that you declared except those stored in the EEPROM.
 
-- maybe there is another flag for low-voltage reset?
 
-- POR, this can be set by your compiler or it can be done manually. what this does is, upon power-up the program counter will point to the reset vector and execute the code from their.
 
-- pulling /RESET to low doesn't do anything. it is pulled high since it is inverted.
 
 
 
i guess, hehe :smileyhappy:
 
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