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DDR stress tester V2.00 problem with i.MX6 solo lite interfacing with DDR3

Question asked by kwangbog ham on Jul 22, 2015
Latest reply on Aug 11, 2016 by Robert Strange

Dear Sir,


1. Our board structure:


- Our board has i.MX6 solo lite with DDR3.


2. DDR stress tester program:


- I use the DDR stress tester V2.00. (As you can know, script for V1.0.3 program don't support DDR3)


3. DDR3 specification (Please, refer to the attached file - Consumer_DDR3_H5TQ4G8(6)3CFR(Rev1 0)_141001.pdf)


// Manufacturer: SK hynix 

// Device Part Number: H5TQ4G63CFR-RDI 

// Clock Freq.:  400MHz 

// Density per CS in Gb:  4 

// Chip Selects used: 1 

// Total DRAM density (Gb) 4 

// Number of Banks: 8 

// Row address:     15 

// Column address:  10 

// Data bus width 16



4. Aid script file (Please, refer to the attached file - MX6SL_MMDC_DDR3_register_programming_aid_v0.7.xlsx)


- We got the attached file from your distributor for doing DDR3 stress test.

- And then, we only changed something like the DDR3 specification part.(Plz, refer to MX6SL_MMDC_DDR3_register_programming_aid_v0.7_iRevo_V0.1.xlsx)

- We think that there is no problem and our mistake.

- Please, check our revised Aid script whether it's OK or not.


5. Run the program.


- Target: MX6SL

- ARM speed: 800MHz

- DDR Density: 512MB

- DDR CS: 0

- DDR channel: 0

- Load init script

- and then click the "Download button"


6. Problem are as the below:



- Message is "ERROR: DCD addr is out of valid range" Irevo board-DDR tester screen.PNG

- We don't know what's the problem.


Please, give us some checking point.


And another question is


1. This is MCU problem? or script error?


2. Could you have an experience which using the program with DDR stress tester V2.00 for testing the solo lite with DDR3?


Best & Regards,

Kwangbog HAM