I am trying to implement flash configuration functionality on the FRDM-KL02Z board using SWD interface.
According to the documentation, in order to perform any FTFA flash operation, the CCIF bit in the FTFA_STAT register must be set.
From the bit description:
The CCIF bit is reset to 0 but is set to 1 by the memory controller at the end of the reset initialization
- sequence. Depending on how quickly the read occurs after reset release, the user may or may not see the
0 hardware reset value.
When I tried to implement these operations on a board after flash mass erase operation, I saw that the CCIF bit is never being set.
Only after burning a demo firmware using the USB interface, I saw the respond, and the bit was set.
My question is, what is setting this bit? According to the document, the memory controller is supposed to initialize it, so is it firmware related?
I would appreciate if you can provide some explanation about the boot sequence and how it initiates the flash interface.
If I have a new board, how can I access it with no FW uploaded to it?