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i.MX6 and NAND flash H27UBG8T2CTR

Question asked by vladislavkasik on Mar 6, 2015
Latest reply on Mar 25, 2015 by vladislavkasik



We have ongoing i.MX6 design with SK Hynix H27UBG8T2CTR NAND flash. It is MLC, 32Gbit, 8192 bytes per page, 2M block and 640 bytes OOB with 40bit/1KBytes ECC Level, see the attached datasheet. We are using current Yocto imx-3.10.53-1.1.0_ga BSP and Duallite i.MX6


We have encountered 2 issues:

  1. The flash does not get auto detected properly both in u-boot and Linux kernel apparently due to a slightly different ID structure. It gets detected only as 4k page flash with 128 byte OOB only.
  2. If we add the flash manually into the Linux kernel into nand_flash_ids in nand_ids.c:
        {"H27UBG8T2CTR 32G 3.3V 8-bit",
            { .id = {0xad, 0xd7, 0x94, 0x91, 0x60, 0x44} },
              SZ_8K, SZ_4K, SZ_2M, 0, 6, 640, NAND_ECC_INFO(40, SZ_1K) },
    then the flash seems to get detected properly however we get the following error:
    nand: device found, Manufacturer ID: 0xad, Chip ID: 0xd7
    nand: Hynix H27UBG8T2CTR 32G 3.3V 8-bit
    nand: 4096MiB, MLC, page size: 8192, OOB size: 640
    gpmi-nand 112000.gpmi-nand: We can not support this nand chip. Its required ecc strength(44) is beyond our capability(40).
    gpmi-nand 112000.gpmi-nand: Error setting BCH geometry : 1
    gpmi-nand 112000.gpmi-nand: driver registration failed: 1
    gpmi-nand: probe of 112000.gpmi-nand failed with error 1

My question is, can this flash be supported by the i.MX6 NAND/BCH controller using selected settings?


Is it a good idea to lower ECC strength under what has been specified by the NAND manufacturer to fit in the nand flash controller capability or we should rather consider using different chip?


Thank you very much for any advice beforehand!