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Question, i.MX28 ENABLE_DCDC bit setting

Question asked by AVNET JAPAN FAE (team share account) on Dec 10, 2014
Latest reply on Dec 10, 2014 by Yuri Muhin

Dear team,

 

I would like to ask about ENABLE_DCDC bit setting of i.MX28.

My customer is confused on the setting of ENABLE_DCDC bits.

There are two ENABLE_DCDC bits;

One is in HW_POWER_5VCTRL register and another is in HW_POWER_DCDC4P2 register.

In i.MX28 reference manual, it is said as follows for the description of the bit in HW_POWER_DCDC4P2 register.

“Enable the dcdc converter to use the DCDC_4P2 pin as a power source…”

In my understanding the DCDC_4P2 comes from internal 4P2 LinReg. And it also means 5V is present as reference manual says as the description for the bit in HW_POWER_5VCTRL.

So, the customer thinks the meanings of two ENABLE_DCDC bits are the same.

Could you give a help to better understanding on the two ENABLE_DCDC bits setting?

 

Thanks,

Miyamoto

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