Questions about QSPI in LS1021A

[hwei]

Hi,

I am trying to use QSPI channel B on our LS1021A board, but I get confused :

1) In RM 30.1 QSPI signals, there are 2 QSPI channels in LS1021A.

2) In RM 4.4.5 RCW definition, there are no options for QSPI_DIO_B[0:2] in IFC_GRP_D_BASE/IFC_GRP_D_EXT.

So, can I use QSPI channel B or not? How should I set it up in RCW?

How should I configure it in linux kernel device tree?

Thanks

[yipingwang]

Hello H Wei,

According to LS1021 data sheet, QSPI_DIO_B[0:2] should be determined by RCW[IFC_GRP_D_EXT], the value is "001", I need to confirm with the document team.

Have a great day,
Yiping

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[hwei]

Hi Yiping,

Thanks for your reply.

I have applied it in my RCW file, but I get some trouble while configuring it in kernel device tree.

Here is my setting:

&qspi {

        num-cs = <2>;

        bus-num = <0>;

        fsl,spi-num-chipselects = <4>;

        fsl,spi-flash-chipselects = <2>;

        status = "okay";

        adxl362@0 {

                #address-cells = <1>;

                #size-cells = <1>;

                compatible = "adxl362";

                spi-max-frequency = <500000>;

                reg = <0>;

        };

};

but I get an error:

adxl362 spi32766.2: Failed to probe (0xFF:0xFF)

Are there errors in my settings, how could I enable the channel B0 in device tree?

Thanks

[yipingwang]

Hello H Wei,

The device ID "adxl362" is not included in the device ID list, have you added it in the driver source code by yourself?

Thanks,

Yiping

[hwei]

Hi Yiping,

The adxl362 is an spi accelerometer, it's attached to the CS_B0 and use DIO_B0&DIO_B1.

I just compile its driver and load in the kernel.

Should I still need to add some extra code to somewhere else?

Thanks

[yipingwang]

Hello H Wei,

Would you please send the whole Kernel boot up log to me? Probably there is hardware frequency configuration problem.

Thanks,

yiping

[hwei]

Hi Yiping,

Yes, it could be the frequency problem.

The lowest frequency of QSPI CLK should be 1G/20/8.5=5.88MHz, right?

But what I get is 1G/20=50MHz, I cannot change the frequency by SCLKCFG.

I have tried to modify the QuadSPI_MCR register value in linux and uboot, but the QSPI CLK frequency didn't change.

Thanks.

[yipingwang]

Hello H Wei,

You could download QCVS V4.1.1 for ARM v7 from Processor Expert Software: QCVS|Freescale to assist you in the design.

In addition "adxl362" doesn't appear in your Kernel console log, do you insert it as a Kernel module?

I will give you more feedback later regarding the latest QSPI driver fix.

Thanks,

Yiping

[hwei]

Hi Yiping,

I'm using the Code Warrior for LS1021A, there is some QCVS component in it.

Yes, I load the adxl362 driver as a kernel module. The error occurs while I try to load it.

I have another question: in my device tree I set the SPI frequency to 500KHz, but the QSPI frequency can only be above 5.88MHz, right?

Thanks

[yipingwang]

Hello H Wei,

I am not sure why you assigned 500K in your dts file, you could refer to the ls1021a-qds.dts

        qflash0: s25fl128s@0 {

                compatible = "spansion,s25fl128s";

                #address-cells = <1>;

                #size-cells = <1>;

                spi-max-frequency = <20000000>;  // 20M

                reg = <0>;

        };

Please refer to fsl_qspi_nor_setup_last in drivers/mtd/spi-nor/fsl-quadspi.c for clk setting.

Thanks,

Yiping

[hwei]

Hi Yiping,

The 500K frequency is the limitation in that driver.

Thanks

[yipingwang]

Hello H Wei,

Please consider about other low-speed peripherals for example DSPI.

For example,

&dspi0 {

        bus-num = <0>;

        status = "okay";

        dspiflash: at45db021d@0 {

                compatible = "atmel,at45db021d", "atmel,at45", "atmel,dataflash";

                #address-cells = <1>;

                #size-cells = <1>;

                spi-max-frequency = <3000000>;

                spi-cpol;

                spi-cpha;

                reg = <0>;

        };

Thanks,

Yiping

[hwei]

Hi Yiping,

We move this device to SPI2 CS2, but it still doesn't work normally.

Here is my setting:

&dspi1 {

        bus-num = <2>;

        status = "okay";

        spidev@2 {

                compatible = "spidev";

                #address-cells = <1>;

                #size-cells = <1>;

                spi-max-frequency = <500000>;

                reg = <2>;

        };

Is there anything wrong?

Thanks

[yipingwang]

Hello H Wei,

Would you please send the Kernel log to me?

I could get the error message from it.

Thanks,

Yiping

[hwei]

Hi Yiping,

The console log is attached, I didn't find any dspi error.

I find that the dspi driver may crash sometime.

Thanks

[yipingwang]

Hello H Wei,

Do you mean the device driver could work sometime?

In your log, I didn't find spidev information, in the Kernel source there is file drivers/spi/spidev.c, do you replace it and build it into kernel?

In addition, would you please provide the call trace log when the driver "crash"?

Thanks,

Yiping

[hwei]

Hi Yiping,

The trace log is attached.

I use the kernel spidev driver to test if this device can work or not.

The spidev driver can be loaded normally, there is a spidev device under dev directory, but while I use it I cannot get the wanted results.

I'll get a scope to watch these signals.

Thanks

[yipingwang]

Hello H Wei,

There is no this function "dspi_txrx_transfer" in the latest released SDK for LS. SDK 1.7(including ls1021) will be released these two days, I suggest you update to latest SDK and do verification.

Have a great day,
Yiping

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