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Processor Expert Question

Question asked by David Batistig Employee on Apr 15, 2014
Latest reply on Apr 15, 2014 by djmoore

I had updated to PE10.4 last week and now we are having issues with the ADC channels reading data back.  What I am seeing is for ADC1 when we are selecting the ADC channel to use the MUXSEL "a" or "b" selection is not getting set in the ADC1_CFG2 register.  Also if I set it manually it is not getting cleared,  It appears that it is just not being updated.   I would think there is the same issue with ADC0. This had worked fine in version 10.2 and my engineer in California tells me it works fine in version 10.3 too. 
Would you know if there is another command that I need to call to select this setting?
I am using the MK10DN512VLL10 part.