Is there any restrict for i.MX6 external 24MHz and 32kHz?

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Is there any restrict for i.MX6 external 24MHz and 32kHz?

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satoshishimoda
Senior Contributor I

Hi community,

I have a question about i.MX6D external crystal.

[Q]

Is there any restrict to input sequence between external 24MHz crystal and 32kHz crystal?

(e.g. external 32kHz crystal have to start oscillation before 24MHz start it)

Actually, some custom boards didn't boot.

Then, these boards worked when remove external 32kHz crystal and when replace it to 32kHz external oscillator.

So I doubted the 32kHz crystal as root cause and checked what is different between custom boards and MCIMX6Q-SDP.

Then, the difference is oscillation sequence of 32kHz and 24MHz as attached file. (sorry, the image includes Japanese)

So I want to know whether this is root cause or not.

For your information, I have checked the resistor and capacitor values on 32kHz oscillation circuit are suitable.

And have added 2.2M ohm resistor to XTALI for ERR005777.

Best Regards,

Satoshi Shimoda

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Yuri
NXP Employee
NXP Employee

Section 8.4 (Avoiding reset pitfalls) of the " Hardware Development Guide for i.MX 6 …" :

“Follow these guidelines to ensure that you are booting using the correct boot mode.

• During initial power on while asserting the POR_B reset signal, ensure that 24 MHz clock is active

before releasing POR_B.

• Follow the recommended power-up sequence specified in the i.MX6 data sheet.

• Ensure the POR_B signal remains asserted (low) until all voltage rails associated with bootup are on"

The 32 KHz clock is not mentioned here, since it is not needed for start up because of internal

oscillator. But when an external one is applied it makes sense to ensure that (external) 32 KHz is

stable too.


Have a great day,
Yuri

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satoshishimoda
Senior Contributor I

Can anybody reply me?

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Yuri
NXP Employee
NXP Employee

POR should be asserted utill all inputs clocks and supply voltages are proper and stable. 

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satoshishimoda
Senior Contributor I

Dear Yuri,

Thank you for your reply.

> POR should be asserted utill all inputs clocks and supply voltages are proper and stable.

Yes, but I got a reply it is not critical from service request in past.

So let me focus on only 24MHz and 32kHz timing here.

Best Regards,

Satoshi Shimoda

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Yuri
NXP Employee
NXP Employee

Strictly speaking the (external) POR should "remain asserted until the VDD_ARM_CAP,

VDD_SOC_CAP, and VDD_PU_CAP supplies are stable". 

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satoshishimoda
Senior Contributor I

Hi Yuri,

Sorry, my reply was not suitable.

> Strictly speaking the (external) POR should "remain asserted until the VDD_ARM_CAP,

> VDD_SOC_CAP, and VDD_PU_CAP supplies are stable".

Yes, I think so, too.

The reply I got from service request was "It is not critical even if 24MHz starts oscillation after POR_B releasing.".

It was not a reply about power supply and POR_B releasing.

I'm sorry it would be misleading you.

Then, could you focus on only 24MHz and 32kHz timing here?

Best Regards,

Satoshi Shimoda

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Yuri
NXP Employee
NXP Employee

Section 8.4 (Avoiding reset pitfalls) of the " Hardware Development Guide for i.MX 6 …" :

“Follow these guidelines to ensure that you are booting using the correct boot mode.

• During initial power on while asserting the POR_B reset signal, ensure that 24 MHz clock is active

before releasing POR_B.

• Follow the recommended power-up sequence specified in the i.MX6 data sheet.

• Ensure the POR_B signal remains asserted (low) until all voltage rails associated with bootup are on"

The 32 KHz clock is not mentioned here, since it is not needed for start up because of internal

oscillator. But when an external one is applied it makes sense to ensure that (external) 32 KHz is

stable too.


Have a great day,
Yuri

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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Yuri
NXP Employee
NXP Employee

What about  VDD_ARM_CAP, VDD_SOC_CAP, and VDD_PU_CAP  waveforms ?

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