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Input spec for XTALI pin when using external clock source

Question asked by Gavin Jones on Nov 4, 2013
Latest reply on Nov 21, 2013 by Gavin Jones

Dear Forum,


I wish to drive the XTALI pin of the iMX6 with an external clock source. The data sheet states that this is an acceptable thing to do and provides the DC input specifications in section 4.6.1 on page 37 (iMX6 Dual/Quad for Consumer data sheet rev 2.3). One problem is that the Vih value is specified only in terms of NVCC_PLL_OUT. Whilst it is suggested that this is nominally 1.1V, I cannot find a complete specification for NVCC_PLL_OUT. For example, what is the tolerance on this value?


A second problem is that the spec provided for Vih is not very generous and it would be very difficult to strictly meet this spec. The max value is given as equal to NVCC_PLL_OUT. In the Absolute Maximum Ratings (section 4.1.1 on page 19) it suggests that input voltages may exceed the corresponding supply voltage by up to 300mV - is that acceptable for the XTALI input?


Using a potential divider and aiming for a nominal swing of 1.1V, I can provide a clock with the following characteristics:


Max DC high: 1150mV

Min DC high: 1050mV

Max positive overshoot: 1200mV for 500ps.


Min DC low: 0mV

Max DC low: 10mV

Max negative overshoot: -90mV for 500ps.


Is this acceptable for the XTALI input? Do I need to reduce the high level voltage a little?