Neil Palmer

Input capture problem on M5213EVB

Discussion created by Neil Palmer on Jul 19, 2007
Latest reply on Jul 19, 2007 by Neil Palmer
Hello all.

I am having a heck of a time getting input capture to work on a
Freescale M5213EVB using CW for CF SE V6.4. I have followed all
directions. The code to initialize the input capture was actually
generated by CfInit by MicroAPL, but I have double and triple
checked all settings against the 5213 reference manual to make
sure they are correct. Not only am I not able to trigger an
interrupt, the input capture flag and register is not being set.
I am pulsing GPT0 which is pin 58 on the 100lqfp part with a 10us
pulse, and I verified right on the pin that the pulse is arriving.
I have been able to set up a PIT interrupt at 10mS which is working
fine, and some IRQ interrupts tied to switches on the 5213EVB
which are also working fine. I have also verified in the dubugger
that all registers are set correctly in memory.
the following code shows what I am doing:

This is the setup for input capture:

Code:
voidmcf5213_incap0_init(void){    /*          GPT Channel 0 configured for Input Capture            Capture on rising edge       GPT Channel 1 configured as GPIO input       GPT Channel 2 configured as GPIO input       GPT Channel 3 configured as GPIO input       GPT Timer clock = 40.00 MHz                The following GPT interrupt sources are enabled:           Channel 0                Fast clearing of interrupts disabled    */    MCF_GPTA_GPTIOS = 0;    MCF_GPTA_GPTOC3M = 0;    MCF_GPTA_GPTSCR1 = MCF_GPTA_GPTSCR1_GPTEN;    MCF_GPTA_GPTTOV = 0;    MCF_GPTA_GPTCTL1 = MCF_GPTA_GPTCTL1_OUTPUT3_NOTHING |                      MCF_GPTA_GPTCTL1_OUTPUT2_NOTHING |                      MCF_GPTA_GPTCTL1_OUTPUT1_NOTHING |                      MCF_GPTA_GPTCTL1_OUTPUT0_NOTHING;    MCF_GPTA_GPTCTL2 = MCF_GPTA_GPTCTL2_INPUT3_DISABLED |                      MCF_GPTA_GPTCTL2_INPUT2_DISABLED |                      MCF_GPTA_GPTCTL2_INPUT1_DISABLED |                      MCF_GPTA_GPTCTL2_INPUT0_RISING;    MCF_GPTA_GPTSCR2 = MCF_GPTA_GPTSCR2_PR_4;    MCF_GPTA_GPTPACTL = 0;    MCF_GPTA_GPTDDR = 0;    MCF_GPTA_GPTC0 = 0;    MCF_GPTA_GPTC1 = 0;    MCF_GPTA_GPTC2 = 0;    MCF_GPTA_GPTC3 = 0;    MCF_GPTA_GPTFLG1 = 0x0f;    MCF_GPTA_GPTIE = MCF_GPTA_GPTIE_CI0;}

 

The following is in vectors.s:

Code:
    .extern _IRQ_INCAP0                    vector108:    .long    _IRQ_INCAP0                

 



The following is at the begining of main():

Code:
    // set the interrupt level IL and the interrupt priority IP    MCF_INTC_ICR55 = MCF_INTC_ICR_IL(7) | MCF_INTC_ICR_IP(6);        //PIT    MCF_INTC_ICR44 = MCF_INTC_ICR_IL(7) | MCF_INTC_ICR_IP(7);        //input capture    // Unmask 55 = PIT0 interrupt source    MCF_INTC_IMRL &= ~(MCF_INTC_IMRL_MASKALL);    MCF_INTC_IMRH &= ~(MCF_INTC_IMRH_INT_MASK55);            //PIT    MCF_INTC_IMRH &= ~(MCF_INTC_IMRH_INT_MASK44);            //input capture    asm( move.w   #0x2000,   sr ); // enable all priority levels

 
  
    
And this is my interrupt routine:
Code:
__declspec(interrupt)void IRQ_INCAP0( void ){    incap_val = MCF_GPTA_GPTC0;    MCF_GPTA_GPTFLG1 |= MCF_GPTA_GPTFLG1_CF0;    MCF_GPIO_PORTTC &= ~2;    }

 
  
I have also attached a pack and go file for the project in case anyone wants
to look at it. Any help would be appreciated, as I am pulling my hair out on
this one.

Regards,
Neil.  

--
Alban Edit: Code formatted
    



Message Edited by Alban on 2007-07-19 03:17 PM

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