P1013/P1022, CW gives errors when trying to flash eLBC connected U-Boot

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P1013/P1022, CW gives errors when trying to flash eLBC connected U-Boot

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tonyranson
Contributor I

We are bringing up the 2nd spin of our P1013/P1022 based board.  We are having trouble programming the eLBC connected NAND flash using the USB TAP JTAG device with CodeWarrior for Power Architecture (Version: 10.3 and build Id:130315).  CW gives us the message:"Performing target initialization ...  Error:  Couldn't stop the target.  Can't stop the target."  Obviously the processor isn't being 'stopped', but what exactly does this mean?  Any ideas on where to look to troubleshoot this problem?

 

Thank you in advance for your help.

 

Tony

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marius_grigoras
NXP Employee
NXP Employee

Hi Tony,

The FlashProgrammer support relies on the tcl bare-board initialization file for these kind of boards (in special for CS and eLBC controller initialization). The u-boot makes this part a little bit different so you cannot use this scenario: u-boot initialization + CW FP.

But I have a suggestion for you: please use the sram init file from PA\PA_Support\Initialization_Files\QorIQ_P1\P1013DS_init_sram_flash.tcl (and the connect target, not the download one) - basically this will use the L2Cache memory as SRAM (very useful for bring-up and stuff like this when you don;t have the initialization part for DRAM).

Regards,

Marius

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marius_grigoras
NXP Employee
NXP Employee

Hi Tony,

The FlashProgrammer support relies on the tcl bare-board initialization file for these kind of boards (in special for CS and eLBC controller initialization). The u-boot makes this part a little bit different so you cannot use this scenario: u-boot initialization + CW FP.

But I have a suggestion for you: please use the sram init file from PA\PA_Support\Initialization_Files\QorIQ_P1\P1013DS_init_sram_flash.tcl (and the connect target, not the download one) - basically this will use the L2Cache memory as SRAM (very useful for bring-up and stuff like this when you don;t have the initialization part for DRAM).

Regards,

Marius

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tonyranson
Contributor I

Marius,

Thank you for the reply.

We used this method on our 1st spin of the board and were successful programming U-Boot into the eLBC NAND flash.  I'm seeing the clocks enabled on JTAG TCK to the CPU and I'm also seeing TDO and TDI at the JTAG connector.  We are also seeing activity on the TMS signal at the JTAG connector.  But I'm not seeing either the SRST or HRST at the JTAG connector, should either or both of these being pulsing?

Thanks again.

Tony

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sinanakman
Senior Contributor III

Tony, I think you would see SRST and HRST activity only while resetting your target board but not afterwards. For flash programming, you might expect to see SRST initially but afterwards you would probably see only TDO/TDI. I am not familiar with FSL's JTAG debuggers but I am  just thinking in general terms. Hope this helps

Sinan Akman

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