AnsweredAssumed Answered

PCIe BAR length limit

Question asked by Enrico Foglio on Jun 12, 2013
Latest reply on May 2, 2017 by S M Anayetullah
Branched to a new discussion



I have a custom FPGA connected to i.mx6q on pcie bus.


I need to open 2 BARs with lengths of 64MB and 256KB but after some tests I found that it seems to be a limit of 4MB for memory regions under which everything's ok and over which I get these messages on kernel startup:


[    1.307700] pci 0000:01:00.0: BAR 0: can't assign mem pref (size 0x4000000)

[    1.314698] pci 0000:01:00.0: BAR 1: can't assign mem pref (size 0x40000)


I've found a similar problem on a previous application with Marvell Armada Xp and I solved it by changing a couple of parameters inside kernel board drivers, but I can't find similar defines inside linux sources for i.mx6.


Can someone help me in finding a solution please?


Thank you very much.