I have a question.
In the Reference manual IIC chapter : The interface is designed to operate up to 100 kbit/s with maximum bus loading and timing.
Does the Kinetis MCU support IIC in the fast mode ?
As Jim commented, 100Kbps is the maximum data rate when the bus is at its maximum capacitance load (400pF). If you do not have that amount of capacitance load, the I2C can achieve fast mode (400kbps).
This does not mean
that 100 k is then maximum clock rate. It means that at maximum loading, the clock and data signals will not be usable due to capacitance Loading.
On other Freescale chips, under ideal conditions I have run I2C at 1.2Mhz just as a test (I have not had a chance to test this one yet).
Note that this is really an overall specification of the I2C bus, not so much the part itself. Also a lower pull up helps for faster speeds.
Thanks for your help.
I think I get it!!
Have a look at the I²C specification and manual of NXP:
On page 55 there are easy formulas & charts to determine pull-up values to meet the rise time requirements. Alternatively, take a look at the timing specs themselves in chapter 6.
Thank you !
It's very useful for me .
Thank you !!
I get it. I will try it on my board.
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