Unable to run the Code from the internal SRAM

[manishsharma]

Hi,

I am unable to run my code from internal 512kb SRAM.

My Setup :- MPC8548CDS system; JTAG USB tap

I am unable to execute my code from the internal SRAM, my default configuration of the .cfg file is for DDR RAM where it creates the LAW(Local Access Window )entry, configure tlb for the CCSR register configure the IVPR and IVPOR registers for interrupt table etc.

I have configured the SRAM and able to download the code at the offset 0x2000(by changing the code warrior target settings) leaving the space for Interrupt Vector table but my code is not executing from the SRAM if i remove the external DDR RAM ? While along with the DDR initialized i am able to write the SRAM memory (configured by L2CTL & L2SRBAR register).

What could be the problem ? As per the MPC reference manual that SRAM configuration supersede all other(DDR SDRAM) configurations. so as a workaround i configured the SRAM at the DDR memory location but it also didn't work ?


What could be the problem ?

[Voxan]

Hi Manish,

could you please contact the support, as described bellow, and reproducible case (best to do this is to do a Help\Pack and Go, save as zip and attached it to your support request)?


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Thanks for your time.
Best Regards