Surinder Singh

C language code for SCI for 68HC908AP64 (DEMO908AP64 board)

Discussion created by Surinder Singh on Sep 13, 2006
Latest reply on Sep 14, 2006 by Surinder Singh
Hi,

I want to write C program using SCI on DEMO908AP64.
I am not able to understand configuratin for calculating baud rate.
I read 68HC908AP64 datasheet and AN3035 (Using the HC08 SCI Module).
I read assembly code supplied with demo board.
I am more confused.

There is option of two xtal on the board.
I chose 32.768KHz

There are three clock sources for Oscillator module MUX.
1) external crystal(XCLK) 2) external RC (RCCLK) 3) internal clock (ICLK)
What is default value of ICLK?
Which one is selected by default? more specifically between ICLK and others.

The reference output of the OSC Module "CGMRCLK", goes through PLL and freq is multiplied K number of times.
What is the PLL frequency multiplier value by default ?

In CGM, there is option of selecting between these two.
CGMXCLK (coming directly from OSC module) OR CGMPCLK (multipled freq out from PLL)
Either of these divided by 2 to get CGMOUT.
What is the default selection?

And, Bus clock = CGMOUT ÷ 2

Is it true that Bus Clock will be always (CGMXCLK or CGMPCLK)/4. Any exceptions?
Is CGMXCLK frequency equal to XCLK in case external crystal is selected by OSC Module?

Now the baud selection part :smileyhappy:

From application note AN3035
------------------------------------------------
1. Configure the SCI clock source
CONFIG2 = 0x01; /* Internal data bus clock source used as clock source for SCI */
.
.
4.
/*****************************************************************
* Fbus = XTAL/4 2.4576 MHz *
* Baud Rate = -------------------- = ---------- = 9600 bps *
* 64 x SCP1:0 x SCR2:0 64 x 1 x 4
SCBR = 0x02; *
------------------------------------------------

What is meant by internal data bus clock? ICLK or Bus clock?
I guess it is Bus clock. In the scenario taken by this application note,
it appears that external crystal of 9.8304 MHz is used.

I want 9600 bps baud, 8 bit data, no parity, 1 stop bit
I need C code.
To use 32.768KHz external crystal, PLL is required to increase the frequency so that it can be divided (by atleast 64 * 4) to get 9600 with some accuracy.

Is there any program somewhere or someone can suggest the relevant configuration
register values?

Also, How can I get Bus clock frequency programmaticaly in C?

Regards
- Surinder

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