How to know Reset is WatchDog Reset ?

[admin]

Hello,

I am using S12xDG128B Microcontroller.

In this micro, I would like to know if there is any way to find whether reset in last power cycle is due to watchdog Reset ?

I Mean, how to tell if reset is happenend due to Watchdog Reset.

Thanks & Regards,

Kishore Kumar.

[kef]

On COP reset, MCU starts from different reset vector.

... But to make it working you should provide that /RESET pin can rise quickly to "1". Having large R*C of pull up resistor and capacitor, connected to /RESET pin, makes MCU unable to use COP or CME reset vectors, and all resets are vectored to main vector at 0xFFFF. See Description of Reset Operation in CRG Block User Guide

[admin]

Hi,

Thanks for your response.

I am able to generate WatchDog Reset and everything is working fine.

In my application I want to do some specific tasks if watchdog reset occured in last power cycle.

Can you tell me how to know reset occured in last power cycle is watchdog reset ...

Thanks & Regards,

Kishore.

[kef · Accepted solution]

I don't understand what you don't understand. It's simple. In case COP reset occurs, MCU starts from the address, which COP reset is pointing to. But like I mentioned you have to provide no large capacitor, no large RC on /RESET pin, else MCU will start always using main reset vector at 0xFFFE.

In case you are using C, you create some flag variable allocated in NO_INIT segment. In cop entry routine you set this variable and jump to startup(). In main entry routine you clear this variable and jump to startup() routine...

[admin]

Hello,

Thanks for your response.

I understood the things happening after COP Reset.

I created ISRs for Vector 0 (main reset vector at 0xFFFE)  and COP Reset.

I observed that, every time if a COP Reset occurs, it is starting from Normal Vector 0 ISR (main reset vector at 0xFFFE) and not from COP Reset.

This is what happened exactly as you explained.

Now I should avoid large capacitor, no large RC on /RESET pin.

Now I dont know How to avoid large capacitance at RESET Pin and make COP Reset triggers COP Reset ISR and not Vector 0.

Basically I have few doubts on it,

How to determine that RESET pin have large RC or large Capacitor ? And How to avoid it? Is it something related Hardware board circuit ?

Quick Response is Highly Appreciated.

Thanks & Regards,

M.S. Kishore Kumar.

[kef]

Yes, it is hardware related. Like I said, look into Description of Reset Operation chapter in CRG Block User Guide (S12CRGxx.pdf)

When COP reset occurs, MCU pulls /RESET pin low for 128 SYSCLK cycles. After MCU releases /RESET pin, voltage at /RESET pin has to rise to logic "1" within 64 SYSCLK cycles, else MCU won't distinguish between external reset and internal resets and always boot using reset vector 0xFFFE. So to make COP vector taken, you are forced to not use large capacitors and/or use lower oscilator clock.

[admin]

Hello,

Thanks for Explanation.

How to make sure that there is large capacitance at RESET PIN ?

Apart from COP Reset Vector, is there any other way to determine COP Reset is occured in last power cycle ?

What I want to do exactly is,

I need to execute Task1() when Reset is COP Reset and Task2() if it normal Power On Reset.

Please see sample code to understand what I want to do,

main()

{

     if(Reset is COP Reset)

      {

          Task1( );

      }

     elseif(Reset is Normal Power On Reset)

     {

            Task2();

     }

}

So I need to check some condition if Reset is due to COP Reset.

Are there any Registers (In MC9S12xDG128 Micro) to check if Reset is COP Reset ?

How to make use of SCTL Register to determine COP Reset ?

Suggest me to Determine COP Reset (assuming there is large Capacitance at RESET PIN).

Thanks & Regards,

Kishore Kumar.

[Lundin]

Simply add a tiny decoupling cap of 100pF or 47pF on the reset line. In my experience, S12D disapproves of larger caps than that. And together with a 10k pull-up, such a cap should be sufficient to filter out the kind of EMI you can expect.

How all of this should be designed depends on how the external brown-out protection circuit looks. You must have such a circuit on the reset pin for S12D, newer S12 have low-voltage detect on-chip.

[kef]

• How all of this should be designed depends on how the external brown-out protection circuit
• looks. You must have such a circuit on the reset pin for S12D, newer S12 have low-voltage detect on-chip.

This reminded me that MCU can fail taking COP and CME vectors also using brown out detector chip with push button function. Such chip detects high to low transition on output pin and pulls output low for a while, which of course makes MCU unable to see "1" on time.

[kef]

• How to make sure that there is large capacitance at RESET PIN ?

You may vector COP reset to routine, which loops forever. Then, you make your main code giving some startup signal like sending message over SCI or blinking a LED few times, and then enable COP and write non 0xAA-0x55 byte to ARMCOP register. In case /RESET pin RC is too large you should keep observing startup signal again and again. In case RC is OK you should see startup signal only once.

But way ismplier it is to measure /RESET pin rise time when COP reset occurs.

• Apart from COP Reset Vector, is there any other way to determine COP Reset is occured in last power cycle ?

No

• Please see sample code to understand what I want to do,

Like I said already, you need to defined COP flag variable in NO_INIT memory segment. To do so edit PRM file and reserve part of your RAM for noinit variables:

SEGMENTS

      RAM _NOINIT     = NO_INIT    0x2800 TO   0x280F;  

      RAM           = READ_WRITE    0x2810 TO   0x3FFF;

...

END

PLACEMENT

     NOINIT_VARS INTO RAM_NOINIT

...

END

Then in your code

#pragma DATA_SEG NOINIT_VARS

char COPflag;

#pragma DATA_SEG DEFAULT

Then you make COP vector pointing to this routine

void COPreset(void)

{

   COPflag = 1;

   asm jmp _Startup

}

void mainreset(void)

{

   COPflag = 0;

   asm jmp _Startup

}

And then

main()

{

     if(COPflag)

      {

          Task1( );

      }

     else

     {

            Task2();

     }

}

• Are there any Registers (In MC9S12xDG128 Micro) to check if Reset is COP Reset ?

No

• How to make use of SCTL Register to determine COP Reset ?

As far as I know there's no such register on S12D

• Suggest me to Determine COP Reset (assuming there is large Capacitance at RESET PIN).

 No way.

Complete S12Dx128 documentation is here:

http://cache.freescale.com/files/microcontrollers/doc/data_sheet/9S12DT128_ZIP.zip

[admin]

Can you give me S12CRGXX.pdf Document ?