The ROM supports the redundant boot for an expansion device (SD/eMMC). The primary or secondary image is selected, depending on the PERSIST_SECONDARY_BOOT setting. Both boot images need to be stored on the same flash (boot source). In the scenario when either primary image is corrupted, or, the chip is in closed mode (Security Configuration Enabled) and there are failures during primary image authentication, the boot ROM turns on the PERSIST_SECONDARY_BOOT bit and performs a software reset.
NOTE: In the Security Reference Manual/Reference Manual redundant boot or secondary boot are the same - meaning the ROM has the capability to choose which image to select from the 2 images located on the same flash device.
NOTE: The i.MX 8/8X family of processors use a different container format for Secondary boot and is not discussed here.
If the PERSIST_SECONDARY_BOOT setting is 0, the boot ROM uses the address for the primary image.
If the PERSIST_SECONDARY_BOOT setting is 1, the boot ROM reads the secondary image table from the address on the boot media and uses the address specified in the table for the secondary image.
Reserved (chipNum) |
Reserved (driveType) |
tag |
firstSectorNumber |
Reserved (sectorCount) |
Table 1. Secondary image table format
Where:
NOTE: The offset to the secondary image is calculated from the start of primary image in the flash and not the start of the flash.
For example: In i.MX6, if the secondary image offset is expected to be 4KB (0x1000), then firstSectorNumber = (0x1000 - 0x400 (primary image offset in flash))/512
For the secondary image support, the primary image must reserve the space for the secondary image table. Refer to the figures below for the layout of the typical structure on an expansion device for the respective part.
i.MX 6/7 | i.MX 8MQ/8MM |
---|---|
In the i.MX 8MNano and i.MX 8MPlus processors, if booting from the device selected by the boot configuration pin or eFuse (Primary Device) fails, ROM will try to boot from the Secondary Image, the offset is relative to the beginning of the boot device (which is provisioned in the fuse IMG_CNTN_SET1_OFFSET).
The fuse IMG_CNTN_SET1_OFFSET (0x490[22:19]) is defined as follows:
For the primary image offset and IVT offset details, please refer to the Primary image offset and IVT offset in the RM of the respective part.
The secondary image offset is specified by fuses, please refer to the fuse map chapter in the RM of the respective part.
NOTE: The i.MX 8MQ (850D) Boot ROM processes the HDMI Firmware only once out of POR. Thus, the secondary image should not contain the HDMI Firmware.
The process described here programs the Secondary bootloader after the Primary bootloader at 0x1000 boundary.
The script to prepare and program the primary, secondary boot images and SIT table is attached.
#Reserved (chipNum) = 0x00000000 #Reserved (driveType) = 0x00000000 #tag = 0x00112233 #firstSectorNumber = Primary align size/512 bytes #Reserved (sectorCount) = 0x00000000
sudo dd if=sit_table of=$dev bs=512 seek=1 count=20 && sync
sudo dd if=sit_table of=$dev bs=512 seek=65 count=20 && sync
sudo dd if=u-boot.primary of=$dev bs=512 seek=2 && sync
sudo dd if=flash.primary of=$dev bs=1k seek=33 && sync
sudo dd if=u-boot.secondary of=$dev bs=512 seek=<(Primary image align size/ 512) + 2> && sync
sudo dd if=flash.secondary of=$dev bs=1K seek=<(Primary image align size/ 1024) + 33> && sync
The process described here programs the Secondary bootloader at the offset specified by the user in IMG_CNTN_SET1_OFFSET fuse.
The script to prepare and program the primary and secondary boot images is attached.
fuse prog 2 1 00100000
sudo dd if=flash.primary of=$dev bs=1k seek=32 && sync
sudo dd if=flash.secondary of=$dev bs=1K seek=<Secondary_image_offset/1024> && sync
mw.l <SRC_GPR10_addr> 0x40000000
sudo dd if=/dev/zero of=$dev bs=1 seek=1024 count=32 && sync
sudo dd if=/dev/zero of=$dev bs=1 seek=33792 count=32 && sync
sudo dd if=/dev/zero of=$dev bs=1 seek=32768 count=32 && sync
Please read Known Issues section
U-Boot 2019.04-00695-g0ef6da0 (Apr 09 2020 - 12:23:09 -0500)
CPU: Freescale i.MX6Q rev1.6 996 MHz (running at 792 MHz)
CPU: Extended Commercial temperature grade (-20C to 105C) aC
Reset cause: POR
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=> md.l 20D8044 1
020d8044: 00000000
=> mw.l 20D8044 40000000
=> md.l 20D8044 1
020d8044: 40000000
=> reset
resetting ...
U-Boot 2019.04-00695-g0ef6da0 (Apr 09 2020 - 12:41:38 -0500)
CPU: Freescale i.MX6Q rev1.6 996 MHz (running at 792 MHz)
CPU: Extended Commercial temperature grade (-20C to 105C) aC
Reset cause: POR
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1- [BootROM/HABv4] - Redundant boot support is not triggered when the first image's code is tampered