imxrt1062 CLK1 LVDS input to drive PLL's not working

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imxrt1062 CLK1 LVDS input to drive PLL's not working

Contributor II

I'm trying to use the LVDS CCM_CLK1_P and CCM_CLK1_N pins to drive the internal PLL's on my imxrt1062 chip. When I use the 24 MHz external crystal oscillator, I can setup my ARM PLL at 528 MHz and the rest of the system at my desired frequencies. However, I'm unable to switch to using a 24 MHz input LVDS signal on the CLK1 pin as the PLL reference frequency. Here's what I'm doing: I set CCM_ANALOG_MISC1 to 0x1000 to disable the LVDS output and enable the LVDS input. Then for each of the CCM_ANALOG_PLL's I'm using (ARM, SYS, USB1, etc) I set bit 14 so it is using the CLK1 instead of REF_CLK_24M. Doing this has no affect -- the system continues to work but its frequencies are derived from the 24MHz crystal and not my CLK1 input.

Here are the values of some registers I've read to hopefully aide in troubleshooting:

CCM_ANALOG_MISC1 = 0x80001000
CCM_ANALOG_PLL_ARM = 0x80006058
CCM_ANALOG_PLL_USB1 = 0x80003040
CCM_ANALOG_PLL_SYS = 0x80006001

Am I missing something I need to set to use the LVDS input?




P.S. To test that the MCU isn't using my external clock, I loop a bunch of nop's in assembly to toggle a pin at exactly 24 MHz. I can then compare that 24 MHz 'clock' to my input clock (CLK1) and see that they slowly drift with regard to each other. If I configure the LVDS CLK1 as an output, then they are synced.


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Contributor II

Thanks Gustavo,

I'm not using MCUXpresso in my final application, but I've been using it for testing. I figured out my problem -- I had my PERCLK_CLK_ROOT using the OSC instead of being generated from my main clock (CSCMR1[PERCLK_PODF]). And I was using a timer for my timing tests, so even though the main clock was synced off the external 24 MHz, my test with the timer failed.

Thanks for note on the USB, I'll have to fix that before I turn on the USB stuff. And turning off the chip oscillator is a good idea -- but easier to catch mistakes that way.


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NXP TechSupport
NXP TechSupport

Hello Ben,

Are you using the MCUXpresso Config Tools to setup your clocks? The registers look okay for the most part in that the BYPASS_CLK_SRC is being set to CLK1, and the LVDSCLK1_IBEN been enabled but there may be other registers missing and the Config Tool makes it easier not to miss settings by mistake.

(From what I could see your registers CCM_ANALOG_PLL_USB1 and USB2 do not have the BYPASS_CLK_SRC to 0x1. Please also make sure to enable the PLL outputs in bit 13).

When testing, you may power down the internal on chip oscillator with CCM_CCR[COSC_EN] to make sure the 24Mhz XTAL oscillator is not driving the PLLs in your configuration.

I hope that this information helps!


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