UB/LB diagram on RT117x for SRAM operations

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UB/LB diagram on RT117x for SRAM operations

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Pierre_Caz
Contributor I

Hi,

We are using a RT117x with SRAM and we have some troubles with timings.

On the Reference manual we cannot find a diagram for SRAM in ASYNC mode non ADMUX that contains LB/UB signals.

This Question shows a diagram that is not found in the RT1170 manual.

About UB/LB Signals behavior when SEMC is used as SRAM-I/F

Where could I find such a diagram ?

Thank you 

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2 Replies

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @Pierre_Caz ,

  I also report internally.

  Our expert said, they will add the UB/LB wave to the new RM version in the future.

   Current, just use my attached picture in the above, that is from the design team.

 

Wish it helps you!

Best Regards,

Kerry

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @Pierre_Caz ,

  I checked some internal information, the UB/LB diagram didn't added to the RM, the picture:

kerryzhou_0-1694666557677.png

Is from the internal side, you can refer to it directly, as it is shared from our internal expert, I think it is from the R&D side, just didn't show in the RM.

You can consider it is from the internal material which is not shared with the customer, thanks.

Wish it helps you!

If you still have question about it, please kindly let me know.

Best Regards,

Kerry

 

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