Some questions about the cache application

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Some questions about the cache application

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513534802
Contributor II

Hi,

When using the SDK to debug problems, recently discovered a problem.

In SDK_2.6.0_EVK-MIMXRT1010\boards\evkmimxrt1010\driver_examples\edma\memory_to_memory,SDK application of edma use AT_NONCACHEABLE_SECTION_INIT to aaply for memory.

The relevant information in the demo is as follows:

#define AT_NONCACHEABLE_SECTION_INIT(var) __attribute__((section("NonCacheable.init"))) var

#define m_data_start 0x20000000
#define m_data_size 0x00008000

RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
.ANY (+RW +ZI)
* (NonCacheable.init)
* (NonCacheable)
}

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2 Replies

813 Views
513534802
Contributor II

Connected to the above question

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/* Region 5 setting: Memory with Normal type, not shareable, outer/inner write back */
MPU->RBAR = ARM_MPU_RBAR(5, 0x20000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_32KB);

It is obvious that section of the definition of memory is not set to noncache. EMDA use memory should be set to noncache, isn't it?

Why use cahce memory for the DMA operation, calibration data is normal

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813 Views
jingpan
NXP TechSupport
NXP TechSupport

Hi ye kang,

TCM is Tightly-Coupled Memories, core can access it directly (cache is not involved). Setting cacheable or not will not have any influence.

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Regards,

Jing