FAQs
English (US) 日本語 | Japanese 中文 | Chinese (Simplified)

Reducing VDD_SOC_IN Voltage

cancel
Turn on suggestions
Auto-suggest helps you quickly narrow down your search results by suggesting possible matches as you type.
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Reducing VDD_SOC_IN Voltage

3 weeks ago
100 Views
Sam_ECU
Contributor V

Hello,

Below my design for VDD_SOC_IN for MIMXRT1062 copied from the EVK-Design:

Sam_ECU_0-1714556669984.png

 

With this design I'm measuring 1.284V at VDD_SOC_IN.

For the industrial chip the information below is stated in the Hardware Design Manual:

Sam_ECU_1-1714556748279.pngSam_ECU_2-1714556758017.png

Looking through the Reference Manual I can find the information below:

Sam_ECU_3-1714556853315.png

Sam_ECU_4-1714556910916.png

Sam_ECU_5-1714557064862.png

Are there any examples for reducing the voltage in the software?

Is it possible or advisable to reduce the voltage with hardware?

Cheers,

Sam

0 Kudos
Reply
1 Reply

3 weeks ago
80 Views
Omar_Anguiano
NXP TechSupport
NXP TechSupport

Hello

It is possible to reduce the voltage externally but only using an external PMIC, internal DCDC needs to be disabled.
If using internal DCDC to power the board, you can reference the power mode switch demo from the SDK. To enter different low-power modes, core voltage must be adjusted so you can use the lpm drivers for reference.

Best regards,
Omar

0 Kudos
Reply